A Maximum Likelihood Combined Cognitive Radio Analysis for Amplitude-Locked Loop. - Yin-Chih Chen; Yen-Chih Yu; Gwo-Jia Jong (CSEE (5), 2011)

The FPGA Implementation of Amplitude-Locked Loop System for Co-channel Communication Chip Design. - Chia-Hung Huang; Yin-Chih Chen; Gwo-Jia Jong (CSEE (5), 2011)

The Implementation of an Amplitude-Locked Loop for Digital Communication Chip Design. - Gwo-Jia Jong; Yin-Chih Chen; Chen-Shen Huang; Gwo-Jeng Yu; Gwo-Jiun Horng (Wirel. Pers. Commun., 2013)