12.1 A 148nW General-Purpose Event-Driven Intelligent Wake-Up Chip for AIoT Devices Using Asynchronous Spike-Based Feature Extractor and Convolutional Neural Network. - Zhixuan Wang; Le Ye; Ying Liu 069; Peng Zhou; Zhichao Tan; Haitao Fan; Yihan Zhang 002; Jiayoon Ru; Yangyuan Wang; Ru Huang 001 (ISSCC, 2021)

A 148-nW Reconfigurable Event-Driven Intelligent Wake-Up System for AIoT Nodes Using an Asynchronous Pulse-Based Feature Extractor and a Convolutional Neural Network. - Zhixuan Wang; Ying Liu 069; Peng Zhou; Zhichao Tan; Haitao Fan; Yihan Zhang 002; Linxiao Shen; Jiayoon Ru; Yangyuan Wang; Le Ye; Ru Huang 001 (IEEE J. Solid State Circuits, 2021)

The Challenges and Emerging Technologies for Low-Power Artificial Intelligence IoT Systems. - Le Ye; Zhixuan Wang; Ying Liu 069; Peiyu Chen; Heyi Li; Hao Zhang 119; Meng Wu 005; Wei He; Linxiao Shen; Yihan Zhang 002; Zhichao Tan; Yangyuan Wang; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

An 82nW 0.53pJ/SOP Clock-Free Spiking Neural Network with 40µs Latency for AloT Wake-Up Functions Using Ultimate-Event-Driven Bionic Architecture and Computing-in-Memory Technique. - Ying Liu 069; Zhixuan Wang; Wei He; Linxiao Shen; Yihan Zhang 002; Peiyu Chen; Meng Wu 005; Hao Zhang 119; Peng Zhou; Jinguang Liu; Guangyu Sun 003; Jiayoon Ru; et al. (ISSCC, 2022)

A A 22nm 0.43pJ/SOP Sparsity-Aware In-Memory Neuromorphic Computing System with Hybrid Spiking and Artificial Neural Network and Configurable Topology. - Ying Liu 069; Zhiyuan Chen 009; Zhixuan Wang; Wentao Zhao; Wei He; Jianfeng Zhu; Oijun Wang; Ning Zhang; Tianyu Jia; Yufei Ma 002; Le Ye; Ru Huang 001 (CICC, 2023)

An 82-nW 0.53-pJ/SOP Clock-Free Spiking Neural Network With 40-μs Latency for AIoT Wake-Up Functions Using a Multilevel-Event-Driven Bionic Architecture and Computing-in-Memory Technique. - Ying Liu 069; Yufei Ma 002; Wei He; Zhixuan Wang; Linxiao Shen; Jiayoon Ru; Ru Huang 001; Le Ye (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Research progress on low-power artificial intelligence of things (AIoT) chip design. - Le Ye; Zhixuan Wang; Tianyu Jia; Yufei Ma 002; Linxiao Shen; Yihan Zhang 002; Heyi Li; Peiyu Chen; Meng Wu 005; Ying Liu 069; Yiqi Jing; Hao Zhang 119; et al. (Sci. China Inf. Sci., 2023)

30.2 A 22nm 0.26nW/Synapse Spike-Driven Spiking Neural Network Processing Unit Using Time-Step-First Dataflow and Sparsity-Adaptive In-Memory Computing. - Ying Liu 069; Yufei Ma 002; Ninghui Shang; Tianhao Zhao; Peiyu Chen; Meng Wu 005; Jiayoon Ru; Tianyu Jia; Le Ye; Zhixuan Wang; Ru Huang 001 (ISSCC, 2024)

Sparsity-Aware In-Memory Neuromorphic Computing Unit With Configurable Topology of Hybrid Spiking and Artificial Neural Network. - Ying Liu 069; Zhiyuan Chen 009; Wentao Zhao; Tianhao Zhao; Tianyu Jia; Zhixuan Wang; Ru Huang 001; Le Ye; Yufei Ma 002 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

13.1 A 0.22mm2 161nW Noise-Robust Voice-Activity Detection Using Information-Aware Data Compression and Neuromorphic Spatial-Temporal Feature Extraction. - Ying Liu 069; Jie Li; Qining Zhang; Tianhao Zhao; Chenhao Shi; Ninghui Shang; Peiyu Chen; Xiaohuan Ge; Yufei Ma 002; Linxiao Shen; Zhixuan Wang; Ru Huang 001; et al. (ISSCC, 2025)