Low-cost concurrent error detection schemes for logarithmic converters. - Tso-Bing Juang; Ying-Ren Lee; Chin-Chieh Chiu (ISOCC, 2016)

Seamlessly Pipelined Shift-and-Add Circuits Based on Precise Delay Analysis and Its Applications. - Tso-Bing Juang; Ying-Ren Lee (ISVLSI, 2016)

Low-area implementations of concurrent error detection logarithmic processors. - Tso-Bing Juang; Ying-Ren Lee (ISOCC, 2017)