Small Area High Speed Configurable FFT Processor. - Xiaoyu Zhang; Xin Chen 039; Ying Zhang 068 (ICICDT, 2019)

A New Hardware Trojan Design: Distinguishing Between Trigger Inputs and Functional Inputs Is Difficult: Work-in-Progress. - Minghui Ge; Ying Zhang 068; Sen Li; Jiaqi Yao; Zhiming Mao; Xin Chen 039 (CODES+ISSS, 2020)

Hardware Trojans Detection Through RTL Features Extraction and Machine Learning. - Jizhong Yang; Ying Zhang 068; Yifeng Hua; Jiaqi Yao; Zhiming Mao; Xin Chen 039 (AsianHOST, 2021)

Efficient Anti-Glare Ceramic Decals Defect Detection by Incorporating Homomorphic Filtering. - Xin Chen 039; Ying Zhang 068; Lang Lin; Junxiang Wang; Jiangqun Ni (Comput. Syst. Sci. Eng., 2021)

Z-domain modeling methodology for homodyne digital optical phase-locked loop. - Xin Chen 039; Xiaoyu Liu; Ying Zhang 068; Yongxin Shan; Qiang Hu; Jun Li 046; Shiqi Lan (IEICE Electron. Express, 2021)

PUF-based Secure Test Wrapper Design for Network-on-Chip. - Ying Zhang 068; Yuanxiang Li; Xin Chen 039; Jizhong Yang; Yifeng Hua; Jiaoyan Yao (HOST, 2022)

Blinding HT: Hiding Hardware Trojan signals traced across multiple sequential levels. - Ying Zhang 068; Minghui Ge; Xin Chen 039; Jiaqi Yao; Zhiming Mao (IET Circuits Devices Syst., 2022)

Hybrid multi-level hardware Trojan detection platform for gate-level netlists based on XGBoost. - Ying Zhang 068; Sen Li; Xin Chen 039; Jiaqi Yao; Zhiming Mao; Jizhong Yang; Yifeng Hua (IET Comput. Digit. Tech., 2022)

FPGA-Based Cross-Hardware MBU Emulation Platform for Layout-Level Digital VLSI. - Xin Chen 039; Liangzhou Huo; Yudong Xie; Zhihao Shen; Zhiqiang Xiang; Changhao Gao; Ying Zhang 068 (ATS, 2023)

Spotlight: An Impairing Packet Transmission Attack Targeting Specific Node in NoC-based TCMP. - Jiaoyan Yao; Ying Zhang 068; Yifeng Hua; Yuanxiang Li; Jizhong Yang; Xin Chen 039 (ETS, 2023)

Low-Overhead Triple-Node-Upset-Tolerant Latch Design in 28-nm CMOS. - Xin Chen 039; Yuxin Bai; Jianpeng Cao; Lei Wang 226; Xinjie Zhou; Ying Zhang 068; Weiqiang Liu 001 (IEEE Trans. Very Large Scale Integr. Syst., 2023)

FPGA Design of Blind Zone-Suppressed Phase Frequency Detector via Reset Mask and Edge Recovery Operations. - Xin Chen 039; Yuxin Bai; Xiaoyu Liu; Ying Zhang 068 (Circuits Syst. Signal Process., 2023)

Double-Node-Upset Self-Recoverable Latch Design for Wide Voltage Range Application. - Yuxin Bai; Xin Chen 039; Xinjie Zhou; Yanan Yin; Ying Zhang 068 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Low-Overhead Triple-Node-Upset Self-Recoverable Latch Design for Ultra-Dynamic Voltage Scaling Application. - Xin Chen 039; Yuxin Bai; Hao Cai 001; Congyi Zhu; Xinjie Zhou; Ying Zhang 068; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)