FSA: An Efficient Fault-tolerant Systolic Array-based DNN Accelerator Architecture. - Yingnan Zhao 001; Ke Wang 030; Ahmed Louri (ICCD, 2022)

An Efficient Hardware Accelerator Design for Dynamic Graph Convolutional Network (DGCN) Inference. - Yingnan Zhao 001; Ke Wang 030; Jiaqi Yang; Ahmed Louri (DAC, 2024)

OPT-GCN: A Unified and Scalable Chiplet-Based Accelerator for High-Performance and Energy-Efficient GCN Computation. - Yingnan Zhao 001; Ke Wang 030; Ahmed Louri (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

A High-Performance and Flexible Accelerator for Dynamic Graph Convolutional Networks. - Yingnan Zhao 001; Ke Wang 030; Ahmed Louri (DATE, 2025)