A 25-Gb/s 32.1-dB CMOS limiting amplifier for integrated optical receivers. - Zhengxiong Hou; Yipeng Wang 003; Quan Pan 002; C. Patrick Yue (ASICON, 2013)

A 65-nm CMOS P-well/Deep N-well avalanche photodetector for integrated 850-nm optical. - Quan Pan 002; Zhengxiong Hou; Yipeng Wang 003; C. Patrick Yue (ASICON, 2013)

A 41-mW 30-Gb/s CMOS optical receiver with digitally-tunable cascaded equalization. - Quan Pan 002; Yipeng Wang 003; Zhengxiong Hou; Li Sun; Liang Wu; Wing-Hung Ki; Patrick Chiang 001; C. Patrick Yue (ESSCIRC, 2014)

A 48-mW 18-Gb/s fully integrated CMOS optical receiver with photodetector and adaptive equalizer. - Quan Pan 002; Zhengxiong Hou; Yipeng Wang 003; Yan Lu 002; Wing-Hung Ki; Keh-Chung Wang; C. Patrick Yue (VLSIC, 2014)

A 60GHz 4Gb/s fully integrated NRZ-to-QPSK modulator SoC for backhaul links in fiber-wireless networks. - Yipeng Wang 003; Duona Luo; Quan Pan 002; Liwen Jing; Zhixin Li; C. Patrick Yue (ESSCIRC, 2015)

A Fully-Integrated Low-Dropout Regulator With Full-Spectrum Power Supply Rejection. - Yan Lu 002; Yipeng Wang 003; Quan Pan 002; Wing-Hung Ki; C. Patrick Yue (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A 60-GHz 4-Gb/s Fully Integrated NRZ-to-QPSK Fiber-Wireless Modulator. - Yipeng Wang 003; Duona Luo; Quan Pan 002; Liwen Jing; Zhixin Li; C. Patrick Yue (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

A 112-GB/S PAM4 Transmitter in 16NM FinFET. - Kee Hian Tan; Ping-Chuan Chiang; Yipeng Wang 003; Haibing Zhao; Arianne Roldan; Hongyuan Zhao; Nakul Narang; Siok-Wei Lim; Declan Carey; Sai Lalith Chaitanya Ambatipudi; Parag Upadhyaya; Yohan Frans; et al. (VLSI Circuits, 2018)

6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET. - Jay Im; Kevin Zheng; Adam Chou; Lei Zhou; Jae Wook Kim; Stanley Chen; Yipeng Wang 003; Hao-Wei Hung; Kee Hian Tan; Winson Lin; Arianne Roldan; Declan Carey; et al. (ISSCC, 2020)

A 42-dB Ω 25-Gb/s CMOS Transimpedance Amplifier With Multiple-Peaking Scheme for Optical Communications. - Quan Pan 002; Yipeng Wang 003; C. Patrick Yue (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A 1.24pJ/b 112Gb/s (870Gbps/mm) Transceiver for In-package Links in 7nm FinFET. - Chi Fung Poon; Wenfeng Zhang; Junho Cho; Shaojun Ma; Yipeng Wang 003; Ying Cao 010; Asma Laraba; Eugene Ho; Winson Lin; Zhaoyin Daniel Wu; Kee Hian Tan; Parag Upadhyaya; et al. (VLSI Circuits, 2021)

A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET. - Jay Im; Kevin Zheng; Chuen-Huei Adam Chou; Lei Zhou; Jae Wook Kim; Stanley Chen; Yipeng Wang 003; Hao-Wei Hung; Kee Hian Tan; Winson Lin; Arianne Roldan; Declan Carey; et al. (IEEE J. Solid State Circuits, 2021)

A 1.24-pJ/b 112-Gb/s (870 Gb/s/Mm) Transceiver for In-Package Links in 7-nm FinFET. - Chi Fung Poon; Wenfeng Zhang; Junho Cho; Shaojun Ma; Yipeng Wang 003; Ying Cao 010; Asma Laraba; Eugene Ho; Winson Lin; Zhaoyin Daniel Wu; Kee Hian Tan; Parag Upadhyaya; et al. (IEEE J. Solid State Circuits, 2022)

A O.96pJ/b 7 × 50Gb/s-per-Fiber WDM Receiver with Stacked 7nm CMOS and 45nm Silicon Photonic Dies. - Mayank Raj; Chuan Xie; Ade Bekele; Adam Chou; Wenfeng Zhang; Ying Cao 010; Jae Wook Kim; Nakul Narang; Hongyuan Zhao; Yipeng Wang 003; Kee Hian Tan; Winson Lin; et al. (ISSCC, 2023)