A Model-Specific End-to-End Design Methodology for Resource-Constrained TinyML Hardware. - Yanchi Dong; Tianyu Jia; Kaixuan Du; Yiqi Jing; Qijun Wang; Pixian Zhan; Yadong Zhang; Fengyun Yan; Yufei Ma 002; Yun Liang 001; Le Ye; Ru Huang 001 (DAC, 2023)

An Information-Aware Adaptive Data Acquisition System using Level-Crossing ADC with Signal-Dependent Full Scale and Adaptive Resolution for IoT Applications. - Yiqi Jing; Zhixuan Wang; Linxiao Shen; Yihan Zhang 002; Peiyu Chen; Jiayoon Ru; Le Ye (ISCAS, 2023)

DCIM-3DRec: A 3D Reconstruction Accelerator with Digital Computing-in-Memory and Octree-Based Scheduler. - Yiqi Jing; Yiyang Sun; Xiao Wang; Wentao Zhao; Meng Wu 005; Fengyun Yan; Yufei Ma 002; Le Ye; Tianyu Jia (ISLPED, 2023)

Research progress on low-power artificial intelligence of things (AIoT) chip design. - Le Ye; Zhixuan Wang; Tianyu Jia; Yufei Ma 002; Linxiao Shen; Yihan Zhang 002; Heyi Li; Peiyu Chen; Meng Wu 005; Ying Liu 069; Yiqi Jing; Hao Zhang 119; et al. (Sci. China Inf. Sci., 2023)

S2D-CIM: A 22nm 128Kb Systolic Digital Compute-in-Memory Macro with Domino Data Path for Flexible Vector Operation and 2-D Weight Update in Edge AI Applications. - Meng Wu 005; Wenjie Ren; Peiyu Chen; Wentao Zhao; Yiqi Jing; Jiayoon Ru; Zhixuan Wang; Yufei Ma 002; Ru Huang 001; Tianyu Jia; Le Ye (CICC, 2024)

AIG-CIM: A Scalable Chiplet Module with Tri-Gear Heterogeneous Compute-in-Memory for Diffusion Acceleration. - Yiqi Jing; Meng Wu 005; Jiaqi Zhou; Yiyang Sun; Yufei Ma 002; Ru Huang 001; Tianyu Jia; Le Ye (DAC, 2024)

A Heterogeneous TinyML SoC with Energy-Event-Performance-Aware Management and Compute-in-Memory Two-Stage Event-Driven Wakeup. - Yanchi Dong; Xueping Liu; Kangbo Bai; Guoxiang Li; Meng Wu 005; Yiqi Jing; Yihan Zhang 002; Pixian Zhan; Yadong Zhang; Yufei Ma 002; Ru Huang 001; Le Ye; et al. (VLSI Technology and Circuits, 2024)

GSNorm: An Efficient 3D Gaussian Rendering Accelerator with Splat Normalization and LUT-assist Rasterization. - Yiyang Sun; Peiran Yan; Yiqi Jing; Le Ye; Tianyu Jia (ASP-DAC, 2025)

37.6 A 22nm 60.81TFLOPS/W Diffusion Accelerator with Bandwidth-Aware Memory Partition and BL-Segmented Compute-in-Memory for Efficient Multi-Task Content Generation. - Yiqi Jing; Jiaqi Zhou; Yiyang Sun; Siyuan He; Peiyu Chen; Ru Huang 001; Le Ye; Tianyu Jia (ISSCC, 2025)