A Systolic Algorithm for the k-Nearest Neighbors Problem. - Yirng-An Chen; Youn-Long Lin; Long-Wen Chang (IEEE Trans. Computers, 1992)

Verification of Arithmetic Circuits with Binary Moment Diagrams. - Randal E. Bryant; Yirng-An Chen (DAC, 1995)

Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking. - Yirng-An Chen; Edmund M. Clarke; Pei-Hsin Ho; Yatin Vasant Hoskote; Timothy Kam; Manpreet Khaira; John W. O'Leary; Xudong Zhao 005 (FMCAD, 1996)

ACV: an arithmetic circuit verifier. - Yirng-An Chen; Randal E. Bryant (ICCAD, 1996)

PHDD: an efficient graph representation for floating point circuit verification. - Yirng-An Chen; Randal E. Bryant (ICCAD, 1997)

Space- and Time-Efficient BDD Construction via Working Set Control. - Bwolen Yang; Yirng-An Chen; Randal E. Bryant; David R. O'Hallaron (ASP-DAC, 1998)

Verification of Floating-Point Adders. - Yirng-An Chen; Randal E. Bryant (CAV, 1998)

Equivalence checking of integer multipliers. - Jiunn-Chern Chen; Yirng-An Chen (ASP-DAC, 2001)

Verification of arithmetic circuits using binary moment diagrams. - Randal E. Bryant; Yirng-An Chen (Int. J. Softw. Tools Technol. Transf., 2001)

An efficient graph representation for arithmetic circuitverification. - Yirng-An Chen; Randal E. Bryant (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001)

Algorithms for compacting error traces. - Yirng-An Chen; Fang-Sung Chen (ASP-DAC, 2003)

Advanced techniques for RTL debugging. - Yu-Chin Hsu; Bassam Tabbara; Yirng-An Chen; Fur-Shing Tsai (DAC, 2003)