A 1.64mW Differential Super Source-Follower Buffer with 9.7GHz BW and 43dB PSRR for Time-Interleaved ADC Applications in 10nm. - Yizhak Shifman; Yoel Krupnik; Udi Virobnik; Ahmad Khairi; Yosi Sanhedrai; Ariel Cohen 001 (A-SSCC, 2019)

A Highly Reliable SRAM PUF with a Capacitive Preselection Mechanism and pre-ECC BER of 7.4E-10. - Avi Miller; Yizhak Shifman; Yoav Weizman; Osnat Keren; Joseph Shor (CICC, 2019)

An SRAM PUF with 2 Independent Bits/Cell in 65nm. - Yizhak Shifman; Avi Miller; Yoav Weizman; Alexander Fish; Joseph Shor (ISCAS, 2019)

A Method to Utilize Mismatch Size to Produce an Additional Stable Bit in a Tilting SRAM-Based PUF. - Yizhak Shifman; Avi Miller; Osnat Keren; Yoav Weizman; Joseph Shor (IEEE Access, 2020)

112-Gb/s PAM4 ADC-Based SERDES Receiver With Resonant AFE for Long-Reach Channels. - Yoel Krupnik; Yevgeny Perelman; Itamar Levin; Yosi Sanhedrai; Roee Eitan; Ahmad Khairi; Yizhak Shifman; Yoni Landau; Udi Virobnik; Noam Dolev; Alon Meisler; Ariel Cohen 001 (IEEE J. Solid State Circuits, 2020)

A 2 Bit/Cell Tilting SRAM-Based PUF With a BER of 3.1E-10 and an Energy of 21 FJ/Bit in 65nm. - Yizhak Shifman; Avi Miller; Yoav Weizmann; Joseph Shor (IEEE Open J. Circuits Syst., 2020)

An SRAM-Based PUF With a Capacitive Digital Preselection for a 1E-9 Key Error Probability. - Yizhak Shifman; Avi Miller; Osnat Keren; Yoav Weizman; Joseph Shor (IEEE Trans. Circuits Syst., 2020)

A 8800 μm² CCO-Based Voltage-Droop and Temperature Detector in 65 nm. - Amir Mizrahi; Yizhak Shifman; Joseph Shor (IEEE Access, 2021)

MirrorN PUF: Harvesting Multiple Independent Bits From Each PUF Cell in 65nm. - Yizhak Shifman; Alexander Fish; Joseph Shor (ISCAS, 2022)

A Method for Mitigation of Droop Timing Errors Including a 500 MHz Droop Detector and Dual Mode Logic. - Yizhak Shifman; Inbal Stanger; Netanel Shavit; Ramiro Taco; Alexander Fish; Joseph Shor (IEEE J. Solid State Circuits, 2022)

Preselection Methods to Achieve Very Low BER in SRAM-Based PUFs - A Tutorial. - Yizhak Shifman; Joseph Shor (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Verilog-A Modelling of Electrochemical Sensors for Combined Simulation of Biosensors and Interfaces. - Aakash Jog; Ankit Guptal; Ariel Shapira; Yizhak Shifman; Pinchas Tandeitnik; Joseph Shor; Yosi Shacham-Diamand (IEEE SENSORS, 2024)

An 11uW, 0.08 mm2, 125dB-Dynamic-Range Current-Sensing Dynamic CT Zoom ADC. - Yizhak Shifman; Joseph Shor (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)