Test Pattern Generation for Column Compression Multiplier. - Pingying Zeng; Zhigang Mao; Yizheng Ye; Yuliang Deng (Asian Test Symposium, 1998)

A New Algorithm for Retiming-Based Partial Scan. - Zulan Huang; Yizheng Ye; Zhigang Mao (Asian Test Symposium, 1999)

Implementation of Java Card Virtual Machine. - Liu Songyan; Zhigang Mao; Yizheng Ye (J. Comput. Sci. Technol., 2000)

CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation. - Bin Li; Liyi Xiao; Yizheng Ye; Guoyong Huang (Annual Simulation Symposium, 2001)

A mixed-signal simulator for VHDL-AMS. - Liyi Xiao; Bin Li; Yizheng Ye; Guoyong Huang; JinJun Guo; Peng Zhang (ASP-DAC, 2001)

Design and implementation of concatenated decoder. - Yuxin You; Jinxiang Wang 001; Mingyan Yu; Yizheng Ye (DCV, 2002)

Design and Realization of a Low Power Register File Using Energy Model. - Xuemei Zhao; Yizheng Ye (PATMOS, 2002)

A New Synchronization Algorithm for VHDL-AMS Simulation. - Liyi Xiao; Yizheng Ye; Bin Li (J. Comput. Sci. Technol., 2002)

A Test Architecture for System-on-a-Chip. - Yongsheng Wang; Liyi Xiao; Mingyan Yu; Jinxiang Wang 001; Yizheng Ye (Asian Test Symposium, 2003)

Optimal Schemes for ADC BIST Based on Histogram. - Yongsheng Wang; Jinxiang Wang 001; Fengchang Lai; Yizheng Ye (Asian Test Symposium, 2005)

Large tuning band range of high frequency filter for wireless applications. - Zhiqiang Gao; Jianguo Ma; Yizheng Ye; Mingyan Yu (ISCAS (1), 2005)

The improvement for transaction level verification functional coverage. - Zhonghai Wang; Yizheng Ye (ISCAS (6), 2005)

A CMOS RF tuning wide-band bandpass filter for wireless applications. - Zhiqiang Gao; Jianguo Ma; Mingyan Yu; Yizheng Ye (SoCC, 2005)

Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. - Qingli Zhang; Jinxiang Wang 001; Yizheng Ye (APCCAS, 2006)

A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories. - Jianwei Zhang 006; Yizheng Ye; Bin-Da Liu (APCCAS, 2006)

Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. - Tong Zhou; Zhibo Zhou; Mingyan Yu; Yizheng Ye (APCCAS, 2006)

An energy-efficient temporal encoding circuit technique for on-chip high performance buses. - Qingli Zhang; Jinxiang Wang 001; Yizheng Ye (ACM Great Lakes Symposium on VLSI, 2006)

A CMOS bandpass filter with wide-tuning range for wireless applications. - Zhiqiang Gao; Mingyan Yu; Yizheng Ye; Jianguo Ma (ISCAS, 2006)

Post linearization of CMOS LNA using double cascade FETs. - Guochi Huang; Tae-Sung Kim; Byung-Sung Kim; Mingyan Yu; Yizheng Ye (ISCAS, 2006)

Dependency driven partitioning objects generation for hardware/software partitioning. - Shengtian Sang; Xiaoming Li 002; Yizheng Ye (ISCAS, 2006)

A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs. - Jianwei Zhang 006; Yizheng Ye; Bin-Da Liu (ISLPED, 2006)

A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. - Tong Zhou; Mingyan Yu; Yizheng Ye (VLSI Design, 2006)

Simultaneous reduction in test data volume and test time for TRC-reseeding. - Bin Zhou; Yizheng Ye; Yongsheng Wang (ACM Great Lakes Symposium on VLSI, 2007)

Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters. - Qingli Zhang; Jinxiang Wang 001; Yizheng Ye (VLSI Design, 2008)

A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends. - Zhiqiang Gao; Jianguo Ma; Mingyan Yu; Yizheng Ye (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A Current-Recycling Technique for Shadow-Match-Line Sensing in Content-Addressable Memories. - Jianwei Zhang 006; Yizheng Ye; Bin-Da Liu (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Self-timed Charge Recycling Search-line Drivers in Content-addressable Memories. - Jianwei Zhang 006; Yizheng Ye; Bin-Da Liu; Feng Guan (ISCAS, 2009)

Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping. - Bin Zhou; Yizheng Ye; Xin-chun Wu; Zhao-lin Li (ISCAS, 2009)

A new low power test pattern generator using a variable-length ring counter. - Bin Zhou; Yizheng Ye; Zhao-lin Li; Xin-chun Wu; Rui Ke (ISQED, 2009)

A test set embedding approach based on twisted-ring counter with few seeds. - Bin Zhou; Yizheng Ye; Zhao-lin Li; Jianwei Zhang 006; Xin-chun Wu; Rui Ke (Integr., 2010)

Exact BER Analysis of Differential Chaos Shift Keying Communication System in Fading Channels. - Zhibo Zhou; Jinxiang Wang 001; Yizheng Ye (Wirel. Pers. Commun., 2010)

Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping. - Bin Zhou; Liyi Xiao; Yizheng Ye; Xin-chun Wu (J. Electron. Test., 2011)

Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost. - Bin Zhou; Liyi Xiao; Yizheng Ye; Xin-chun Wu; Bei Cao (J. Low Power Electron., 2012)