Scalable Mean Rate Signal Encoding Analog Neural Network. - Yngvar Berg; Jon-Erik Ruth; Tor Sverre Lande (ISCAS, 1995)

FLOGIC-Floating-gate logic for low-power operation. - Tor Sverre Lande; Dag T. Wisland; Trond Sæther; Yngvar Berg (ICECS, 1996)

Ultra low voltage transconductance amplifier. - Tor Sverre Lande; Yngvar Berg (ICECS, 1998)

Ultra low voltage current multiplier/divider. - Yngvar Berg; Tor Sverre Lande (ICECS, 1999)

Tunable current mirrors for ultra low voltage. - Yngvar Berg; Tor Sverre Lande (ISCAS (2), 1999)

Area efficient circuit tuning with floating-gate techniques. - Yngvar Berg; Tor Sverre Lande (ISCAS (2), 1999)

Ultra low-voltage floating-gate transconductance amplifier with tunable gain and linearity. - Yngvar Berg; Øivind Næss; Mats Høvin (ISCAS, 2000)

Ultra low-voltage floating-gate transconductance amplifier. - Yngvar Berg; Øivind Næss; Mats Høvin (ISCAS, 2000)

Ultralow-voltage floating-gate analog multiplier with tunable linearity. - Yngvar Berg; Øivind Næss; Mats Høvin (ISCAS, 2000)

Neuromorphic cochlea implants. - Tor Sverre Lande; Jan-Tore Marienborg; Yngvar Berg (ISCAS, 2000)

Tunable ultralow voltage transconductance amplifier and GmC filter. - Øivind Næss; Yngvar Berg (ISCAS, 2000)

Novel reconfigurable two-MOSFET UV-programmable floating-gate circuits for CARRY, NAND, NOR or INVERT functions. - Snorre Aunet; Yngvar Berg; Øivind Næss; Trond Sæther (ICECS, 2001)

A method for simulation of floating-gate UV-programmable circuits with application to three new 2-MOSFET digital circuits. - Snorre Aunet; Yngvar Berg; Trond Ytterdal; Øivind Næss; Trond Sæther (ICECS, 2001)

A 0.3 V floating-gate differential amplifier input stage with tunable gain. - Yngvar Berg; Snorre Aunet; Øivind Næss; Henning Gundersen; Mats Høvin (ICECS, 2001)

A novel low-voltage floating-gate CMOS transconductance amplifier with sinh (tanh) shaped output current. - Yngvar Berg; Snorre Aunet; Øivind Næss; Mats Høvin (ICECS, 2001)

Extreme low-voltage floating-gate CMOS transconductance amplifier. - Yngvar Berg; Snorre Aunet; Øivind Næss; Henning Gundersen; Mats Høvin (ISCAS (1), 2001)

Floating-gate CMOS differential analog inverter for ultra low-voltage applications. - Yngvar Berg; Snorre Aunet; Øivind Næss; Mats Høvin (ISCAS (1), 2001)

Exploiting sinh and tanh shaped ultra low-voltage floating-gate transconductance amplifiers to reduce harmonic distortion. - Yngvar Berg; Snorre Aunet; Øivind Næss; Mats Høvin (ISCAS (4), 2001)

A novel floating-gate multiple-valued signal to binary signal converter. - Yngvar Berg; Øivind Næss; Snorre Aunet; Mats Høvin (ICECS, 2002)

A novel floating-gate binary signal to multiple-valued signal converter for multiple-valued CMOS logic. - Yngvar Berg; Øivind Næss; Snorre Aunet; Johannes Goplen Lomsdalen; Mats Høvin (ICECS, 2002)

A novel floating-gate multiple-valued CMOS full-adder. - Yngvar Berg; Snorre Aunet; Øivind Næss; O. Hagen; Mats Høvin (ISCAS (1), 2002)

Novel floating-gate multiple-valued signal to binary signal converters for multiple-valued CMOS logic. - Yngvar Berg; Øivind Næss; Snorre Aunet; Renè Jensen; Mats Høvin (ISCAS (5), 2002)

A low-voltage sinc2 decimator implemented by a new circuit technique using floating-gate MOS transistors. - Mats Høvin; Dag T. Wisland; Yngvar Berg; Tor Sverre Lande (ISCAS (5), 2002)

Delta-sigma modulation in single neurons. - Mats Høvin; Dag T. Wisland; Yngvar Berg; Jan-Tore Marienborg; Tor Sverre Lande (ISCAS (5), 2002)

A low-voltage floating-gate CMOS transconductance amplifier, and a spin-off quasi frequency tripler. - Johannes Goplen Lomsdalen; Yngvar Berg; Renè Jensen (ISCAS (5), 2002)

Tunable floating-gate low-voltage transconductor. - Øivind Næss; Yngvar Berg (ISCAS (4), 2002)

Novel recharge semi-floating-gate CMOS logic for multiple-valued systems. - Yngvar Berg; Snorre Aunet; Omid Mirmotahari; Mats Høvin (ISCAS (5), 2003)

Exploiting hyperbolic functions to increase linearity in low-voltage floating-gate transconductance amplifiers. - Yngvar Berg; Snorre Aunet; Øivind Næss; Johannes Goplen Lomsdalen; Mats Høvin (ISCAS (1), 2003)

A low voltage second order biquad using pseudo floating-gate transistors. - Øivind Næss; Espen A. Olsen; Yngvar Berg; Tor Sverre Lande (ISCAS (1), 2003)

A Novel Multiple-Input Multiple-Valued Semi-Floating-Gate LATC. - Omid Mirmotahari; Yngvar Berg (ISMVL, 2003)

UV-programmable Floating-Gate CMOS Linear Threshold Element "P1N3". - Snorre Aunet; Yngvar Berg (IWANN (2), 2003)

Real-time reconfigurable linear threshold elements implemented in floating-gate CMOS. - Snorre Aunet; Yngvar Berg; Trond Sæther (IEEE Trans. Neural Networks, 2003)

Erratum to "real-time reconfigurable linear threshold elements implemented in floating-gate CMOS". - Snorre Aunet; Yngvar Berg; Trond Sæther (IEEE Trans. Neural Networks, 2003)

Reconfigurable subthreshold CMOS perceptron. - Snorre Aunet; Bengt Oelmann; Suliman Abdalla; Yngvar Berg (IJCNN, 2004)

Max and min functions using Multiple-Valued Recharged Semi-Floating Gate circuits. - Henning Gundersen; Yngvar Berg (ISCAS (2), 2004)

Basic Multiple-Valued Functions Using Recharge CMOS Logic. - Yngvar Berg; Snorre Aunet; Øivind Næss; Omid Mirmotahari (ISMVL, 2004)

A Systolic Parallel Multiplier over GF(3m) Using Neuron-MOS DLC. - Omid Mirmotahari; Yngvar Berg (ISMVL, 2004)

A Novel D-Latch in Multiple-Valued Semi-Floating-Gate Recharged Logic. - Omid Mirmotahari; Yngvar Berg (ISMVL, 2004)

Low-voltage pseudo floating-gate reconfigurable linear threshold elements. - Øivind Næss; Snorre Aunet; Yngvar Berg (IJCNN, 2005)

A Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices. - Henning Gundersen; Renè Jensen; Yngvar Berg (ISMVL, 2005)

Self-refreshing Multiple Valued Memory. - Johannes Goplen Lomsdalen; Renè Jensen; Yngvar Berg (DDECS, 2006)

Multiple Valued Counter. - Johannes Goplen Lomsdalen; Renè Jensen; Yngvar Berg (DDECS, 2006)

Ultra low voltage CMOS gates. - Yngvar Berg; Omid Mirmotahari; Per Andreas Norseng; Snorre Aunet (ICECS, 2006)

A novel ternary more, less and equality circuit using recharged semi-floating gate devices. - Henning Gundersen; Yngvar Berg (ISCAS, 2006)

Switched pseudo floating-gate reconfigurable linear threshold elements. - Øivind Næss; Yngvar Berg (ISCAS, 2006)

A Novel Balanced Ternary Adder Using Recharged Semi-Floating Gate Devices. - Henning Gundersen; Yngvar Berg (ISMVL, 2006)

Pseudo Floating-Gate Inverter with Feedback Control. - Yngvar Berg; Omid Mirmotahari; Snorre Aunet (VLSI-SoC, 2006)

Band Pass Pseudo Floating-Gate Amplifier. - Yngvar Berg; Mehdi Azadmehr; Omid Mirmotahari; Snorre Aunet (ICECS, 2007)

Fault Tolerant CMOS Logic Using Ternary Gates. - Yngvar Berg; Renè Jensen; Johannes Goplen Lomsdalen; Henning Gundersen; Snorre Aunet (ISMVL, 2007)

Fast Addition Using Balanced Ternary Counters Designed with CMOS Semi-Floating Gate Devices. - Henning Gundersen; Yngvar Berg (ISMVL, 2007)

Dual Data-Rate Cyclic D/A Converter Using Semi Floating-Gate Devices. - Renè Jensen; Yngvar Berg (ISMVL, 2007)

Proposal for a Bidirectional Gate Using Pseudo Floating-Gate. - Omid Mirmotahari; Yngvar Berg (DELTA, 2008)

Low Voltage Design against Power Analysis Attacks. - Omid Mirmotahari; Yngvar Berg (DELTA, 2008)

Cascade of Current-Starved Pseudo Floating-Gate inverters. - Mehdi Azadmehr; Yngvar Berg (ICECS, 2008)

Bi-directional Current-Starved Pseudo Floating-Gate differentiator / integrator. - Mehdi Azadmehr; Yngvar Berg; Omid Mirmotahari (ICECS, 2008)

High speed and ultra low voltage CMOS latch. - Yngvar Berg; Omid Mirmotahari; Snorre Aunet (ICECS, 2008)

Ultra low voltage and, nor and XOR CMOS gates. - Yngvar Berg; Omid Mirmotahari; Snorre Aunet (ICECS, 2008)

Clocked semi-floating-gate ultra low-voltage current mirror. - Yngvar Berg; Omid Mirmotahari; Snorre Aunet (ICECS, 2008)

High Speed Ultra Low Voltage CMOS inverter. - Yngvar Berg; Omid Mirmotahari; Johannes Goplen Lomsdalen; Snorre Aunet (ISVLSI, 2008)

Ultra Low Voltage High Speed Differential CMOS Inverter. - Omid Mirmotahari; Yngvar Berg (PATMOS, 2008)

Real-Time Reconfigurable Subthreshold CMOS Perceptron. - Snorre Aunet; Bengt Oelmann; Per Andreas Norseng; Yngvar Berg (IEEE Trans. Neural Networks, 2008)

Low voltage precharge CMOS logic. - Yngvar Berg; Omid Mirmotahari (DDECS, 2009)

Ultra low-voltage switched current mirror. - Yngvar Berg; Omid Mirmotahari (DDECS, 2009)

Ultra low voltage and high speed CMOS carry generate circuits. - Yngvar Berg; Omid Mirmotahari (ECCTD, 2009)

Clocked semi-floating-gate pseudo differential pair for low-voltage analog design. - Yngvar Berg; Omid Mirmotahari (ECCTD, 2009)

Clocked semi-floating-gate ultra low-voltage current multiplier. - Yngvar Berg; Omid Mirmotahari (ECCTD, 2009)

Novel high speed and ultra low voltage CMOS flip-flop. - Yngvar Berg (ICECS, 2009)

Ultra low voltage semi-floating-gate transconductance amplifier based on binary inverters. - Yngvar Berg (ICECS, 2009)

Clocked semi-floating-gate ultra low-voltage inverting current mirror. - Yngvar Berg; Omid Mirmotahari (SoCC, 2009)

Clocked semi-floating-gate ultra low-voltage symmetric and bidirectional current mirror. - Yngvar Berg; Omid Mirmotahari (SoCC, 2009)

Ultra low-voltage bidirectional current mirror using clocked semi-floating-gate transistors. - Yngvar Berg (DDECS, 2010)

Novel high speed and ultra low voltage CMOS flip-flops. - Yngvar Berg (ICECS, 2010)

Reconfigurable pseudo floating-gate analog circuits. - Yngvar Berg; Mehdi Azadmehr (ICECS, 2010)

Novel ultra low voltage transconductance amplifier. - Yngvar Berg (ISCAS, 2010)

Ultra low voltage static carry generate circuit. - Yngvar Berg (ISCAS, 2010)

Low Voltage Semi Floating-Gate Binary to Multiple-Value and Multiple-Value to Binary Converters. - Yngvar Berg (ISMVL, 2010)

New SRAM design using body bias technique for ultra low power applications. - Farshad Moradi; Dag T. Wisland; Hamid Mahmoodi; Yngvar Berg; Tuan Vu Cao (ISQED, 2010)

Ultra low voltage and high speed CMOS flip-flop using floating-gates. - Yngvar Berg (VLSI-SoC, 2010)

Static ultra-low-voltage high-speed CMOS logic and latches. - Yngvar Berg (VLSI-SoC, 2010)

Novel ultra low-voltage and high speed domino CMOS logic. - Yngvar Berg (VLSI-SoC, 2010)

Ultra Low-Voltage and High-Speed CMOS Full Adder Using Floating-Gates and Multiple-Valued Logic. - Yngvar Berg (ISMVL, 2011)

An ultra-low voltage tunable dual-Band Pass Filter. - Mehdi Azadmehr; Belal K. Khajeh; Yngvar Berg (SSD, 2014)

Low-voltage and high-speed CMOS circuit design with low-power mode. - Yngvar Berg; Omid Mirmotahari (ICECS, 2015)

An ultra-low-voltage, semi-floating-gate, domino, dual-rail, NOR gate. - Ali Dadashi; Omid Mirmotahari; Yngvar Berg (ICECS, 2015)

Novel high-speed dynamic differential ultra low voltage logic for supply-voltage below 300 mV. - Omid Mirmotahari; Ali Dadashi; Mehdi Azadmehr; Yngvar Berg (ICECS, 2015)

A new self-sensing approach for actuation and readout of piezoelectric resonating sensor. - Mehdi Azadmehr; Belal K. Khajeh; Yngvar Berg (ICNSC, 2015)

Flexible Ultra-Low-Voltage CMOS Circuit Design Applicable for Digital and Analog Circuits Operating below 300mV. - Yngvar Berg; Omid Mirmotahari (ISVLSI, 2015)

High-Speed, Modified, Bulk stimulated, Ultra-Low-Voltage, Domino Inverter. - Ali Dadashi; Yngvar Berg; Omid Mirmotahari (ISVLSI, 2015)

A discrete implementation of a bidirectional circuit for actuation and read-out of resonating sensors. - Luca Marchetti; Amar Romi; Yngvar Berg; Omid Mirmotahari; Mehdi Azadmehr (DTIS, 2016)

High-speed dynamic dual-rail ultra low voltage static CMOS logic operating at 300 mV. - Omid Mirmotahari; Ali Dadashi; Mehdi Azadmehr; Yngvar Berg (DTIS, 2016)

Bidirectional front-end for piezoelectric resonator. - Luca Marchetti; Yngvar Berg; Omid Mirmotahari; Mehdi Azadmehr (ICNSC, 2016)

An autozeroing inverter based front-end for resonating sensors. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (DTIS, 2017)

A virtual Wheatstone bridge front-end for resistive sensors. - Mehdi Azadmehr; Luca Marchetti; Moataz S. El-Kharashi; Yngvar Berg (ICNSC, 2017)

A control system for a low power bidirectional front-end for resonating sensors. - Luca Marchetti; Yngvar Berg; Omid Mirmotahari; Mehdi Azadmehr (ICNSC, 2017)

A low power analog voltage similarity circuit. - Mehdi Azadmehr; Luca Marchetti; Yngvar Berg (ISCAS, 2017)

A bidirectional front-end with bandwidth control for actuation and read-out of MEMS resonating sensors. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (MIXDES, 2017)

Erfaringer fra strukturert peer review ved bruk av et egetutviklet sensureringsprogram. - Omid Mirmotahari; Yngvar Berg (NIK, 2017)

High-Speed Digital Domino Logic for Ultra-Low Supply Voltages. - Omid Mirmotahari; Yngvar Berg (Circuits Syst. Signal Process., 2017)

Structured peer review using a custom assessment program for electrical engineering students. - Omid Mirmotahari; Yngvar Berg (EDUCON, 2018)

Formative feedback for learning. Case studies of automated feedback in undergraduate computer science education. - Omid Mirmotahari; Crina Damsa; Yngvar Berg (ICLS, 2018)

A bidirectional front-end for ultrasonic pulse-echo measurements. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (ICNSC, 2018)

A Low Power, High Gain Semi-Floating Gate Amplifier for Resonating Sensors Front-End. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (ISVLSI, 2018)

A Discrete Implementation of a Semi-Floating Gate Amplifier for Resonating Sensor Front-End. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (MIXDES, 2018)

Studentaktivisering gjennom bruk av hverandrevurdering for førstesemesters studenter i Canvas LMS: en forsøksstudie. - Omid Mirmotahari; Yngvar Berg; Dag Langmyhr; Ester Fremstad; Crina Damsa (NIK, 2018)

A Self-Actuated Front-End for Resonating Sensors. - Luca Marchetti; Yngvar Berg; Mehdi Azadmehr (TENCON, 2018)

A New Differential Oscillator with T-type Feedback. - Mehdi Azadmehr; Aaron Schreyer-Miller; Igor Paprotny; Yngvar Berg (UEMCON, 2018)

Lower-Order Compensation Chain Threshold-Reduction Technique for Multi-Stage Voltage Multipliers. - Francesco Dell'Anna; Tao Dong 006; Ping Li 029; Yumei Wen; Mehdi Azadmehr; Mario R. Casu; Yngvar Berg (Sensors, 2018)

Student Engagement by Employing Student Peer Reviews with Criteria-Based Assessment. - Omid Mirmotahari; Yngvar Berg; Ester Fremstad; Crina Damsa (EDUCON, 2019)

A Case-Study of Automated Feedback Assessment. - Omid Mirmotahari; Yngvar Berg; Stein Gjessing; Ester Fremstad; Crina Damsa (EDUCON, 2019)

Framework for Pupil-to-Student Transition, Learning Environment and Semester Start for First-Year Students. - Omid Mirmotahari; Gunnar Rye Bergersen; Yngvar Berg; Kristin Bråthen; Kristin Broch Eliassen (I3E Workshops, 2019)

Q-Loading of Colpitts-Based Mass-Sensing Oscillators in Resonator-based MEMS Airborne Particulate Matter (PM) Sensors. - Mehdi Azadmehr; Igor Paprotny; Yngvar Berg (ICCE, 2019)

A 4.5 fJ/conversion-step 10-bit 0.6V Asynchronous SAR ADC for Battery-free Miniature Sensor Nodes in 65nm CMOS. - Ali Dadashi; Yngvar Berg; Omid Mirmotahari (MIXDES, 2019)

Evolution of Technological Innovations, User Experiences, and Literacies. - Omid Mirmotahari; Anders I. Mørch; Yngvar Berg (CoPDA@AVI, 2024)