A 79.2-μW 19.5-kHz-BW 94.8-dB-SNDR Fully Dynamic DT ΔΣ ADC Using CLS-Assisted FIA With Sampling Noise Cancellation. - Akira Matsuoka; Yo Kumano; Tomohiro Nezuka; Yoshikazu Furuta; Tetsuya Iizuka (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A 172.1dB-FoM 19.5kHz-BW DT ΔΣ ADC Using CLS-Assisted Fast Self-Quenching Floating Inverter Amplifier with Sampling Noise Cancellation. - Ximing Wang; Yo Kumano; Tomohiro Nezuka; Yoshikazu Furuta; Tetsuya Iizuka (ISCAS, 2025)

Analysis of Intrinsic Quantizer Non-Linearity in ΔΣ ADCs. - Yo Kumano; Tetsuya Iizuka (IEICE Trans. Electron., 2025)