Fast and Secure Packet Processing Environment for Per-Packet QoS Customization. - Takashi Egawa; Koji Hino; Yohei Hasegawa (IWAN, 2001)

Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. - Noriaki Suzuki; Shunsuke Kurotaki; Masayasu Suzuki; Naoto Kaneko; Yutaka Yamada; Katsuaki Deguchi; Yohei Hasegawa; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takeo Toi; et al. (FCCM, 2004)

Stream applications on the dynamically reconfigurable processor. - Masayasu Suzuki; Yohei Hasegawa; Yutaka Yamada; Naoto Kaneko; Katsuaki Deguchi; Hideharu Amano; Kenichiro Anjo; Masato Motomura; Kazutoshi Wakabayashi; Takao Toi; Toru Awashima (FPT, 2004)

Performance and Cost Analysis of Time-Multiplexed Execution on the Dynamically Reconfigurable Processor. - Hideharu Amano; Shohei Abe; Yohei Hasegawa; Katsuaki Deguchi; Masayasu Suzuki (FCCM, 2005)

Time-multiplexed execution on the dynamically reconfigurable processor: a performance/cost evaluation. - Yohei Hasegawa; Shohei Abe; Katsuaki Deguchi; Masayasu Suzuki; Hideharu Amano (FPGA, 2005)

An I/O mechanism on a Dynamically Reconfigurable Processor - Which should be moved: Data or Configuration? - Hideharu Amano; Shohei Abe; Katsuaki Deguchi; Yohei Hasegawa (FPL, 2005)

An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor. - Yohei Hasegawa; Shohei Abe; Hiroki Matsutani; Hideharu Amano; Kenichiro Anjo; Toru Awashima (FPT, 2005)

Improved data distribution for multipath TCP communication. - Yohei Hasegawa; Ichiro Yamaguchi; Takayuki Hama; Hideyuki Shimonishi; Tutomu Murase (GLOBECOM, 2005)

Performance/Cost Trade-Off Evaluation for the DCT Implementation on the Dynamically Reconfigurable Processor. - Vu Manh Tuan; Yohei Hasegawa; Naohiro Katsura; Hideharu Amano (ARC, 2006)

A Context Dependent Clock Control Mechanism for Dynamically Reconfigurable Processors. - Hideharu Amano; Yohei Hasegawa; Shohei Abe; Kenichiro Ishikawa; Shunsuke Tsutsumi; Shunsuke Kurotaki; Takuro Nakamura; Takashi Nishimura (FPL, 2006)

An adaptive Viterbi decoder on the dynamically reconfigurable processor. - Shohei Abe; Yohei Hasegawa; Takao Toi; Takeshi Inuo; Hideharu Amano (FPT, 2006)

Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor. - Yohei Hasegawa; Shohei Abe; Shunsuke Kurotaki; Vu Manh Tuan; Naohiro Katsura; Takuro Nakamura; Takashi Nishimura; Hideharu Amano (IPDPS, 2006)

A cost-effective context memory structure for dynamically reconfigurable processors. - Masayasu Suzuki; Yohei Hasegawa; Vu Manh Tuan; Shohei Abe; Hideharu Amano (IPDPS, 2006)

Performance Analysis of Multi-process Execution Model on Dynamically Reconfigurable Processor. - Vu Manh Tuan; Yohei Hasegawa; Hideharu Amano (ERSA, 2007)

Design Methodology and Trade-offs Analysis for Parameterized Dynamically Reconfigurable Processor Arrays. - Yohei Hasegawa; Hideharu Amano (FPL, 2007)

Overwrite Configuration Technique in Multicast Configuration Scheme for Dynamically Reconfigurable Processor Arrays. - Satoshi Tsutsumi; Vasutan Tunbunheng; Yohei Hasegawa; Adepu Parimala; Takuro Nakamura; Takashi Nishimura; Hideharu Amano (FPT, 2007)

Deployable multipath communication scheme with sufficient performance data distribution method. - Yohei Hasegawa; Ichiro Yamaguchi; Takayuki Hama; Hideyuki Shimonishi; Tutomu Murase (Comput. Commun., 2007)

Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor with Directly Interconnected PEs. - Masaru Kato; Yohei Hasegawa; Hideharu Amano (ERSA, 2008)

Power reduction techniques for Dynamically Reconfigurable Processor Arrays. - Takashi Nishimura; Keiichiro Hirai; Yoshiki Saito; Takuro Nakamura; Yohei Hasegawa; Satoshi Tsutsumi; Vasutan Tunbunheng; Hideharu Amano (FPL, 2008)

Instruction buffer mode for multi-context Dynamically Reconfigurable Processors. - Toru Sano; Masaru Kato; Satoshi Tsutsumi; Yohei Hasegawa; Hideharu Amano (FPL, 2008)

Exploring the optimal size for multicasting configuration data of dynamically reconfigurable processors. - Takuro Nakamura; Toru Sano; Yohei Hasegawa; Satoshi Tsutsumi; Vasutan Tunbunheng; Hideharu Amano (FPT, 2008)

Leakage power reduction for coarse grained dynamically reconfigurable processor arrays with fine grained Power Gating technique. - Yoshiki Saito; Tomoaki Shirai; Takuro Nakamura; Takashi Nishimura; Yohei Hasegawa; Satoshi Tsutsumi; Toshihiro Kashima; Mitsutaka Nakata; Seidai Takeda; Kimiyoshi Usami; Hideharu Amano (FPT, 2008)

A fine-grain dynamic sleep control scheme in MIPS R3000. - Naomi Seki; Lei Zhao; Jo Kei; Daisuke Ikebuchi; Yu Kojima; Yohei Hasegawa; Hideharu Amano; Toshihiro Kashima; Seidai Takeda; Toshiaki Shirai; Mitsutaka Nakata; Kimiyoshi Usami; et al. (ICCD, 2008)

Cache Controller Design on Ultra Low Leakage Embedded Processors. - Lei Zhao; Hui Xu; Naomi Seki; Yoshiki Saito; Yohei Hasegawa; Kimiyoshi Usami; Hideharu Amano (ARCS, 2009)

MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. - Shotaro Saito; Yoshinori Kohama; Yasufumi Sugimori; Yohei Hasegawa; Hiroki Matsutani; Toru Sano; Kazutaka Kasuga; Yoichi Yoshida; Kiichi Niitsu; Noriyuki Miura; Tadahiro Kuroda; Hideharu Amano (FPL, 2009)

Ethernet Topology Detection from a Single Host without Assistance of Network Nodes or Other Hosts. - Yohei Hasegawa; Masahiro Jibiki (IEICE Trans. Commun., 2009)

Flexible and automated operational control in SDN transport-base virtual router. - Masahiro Hayashitani; Yohei Hasegawa; Kazuya Suzuki; Yasuhiro Mizukoshi (OFC, 2014)

A Transmission Control Protocol for Free-Space Optical Communications. - Yohei Hasegawa (GLOBECOM, 2017)

A Transmission Control Protocol for Long Distance High-Speed Wireless Communications. - Yohei Hasegawa; Jiro Katto (IEICE Trans. Commun., 2018)

Predicting Network Outages Based on Q-Drop in Optical Network. - Yohei Hasegawa; Masato Uchida (COMPSAC (1), 2019)

A Throughput Model of TCP-FSO/ADFR for Free-Space Optical Satellite Communications. - Yohei Hasegawa; Toshiharu Ito; Yoshimasa Ono; Manabu Arikawa (GLOBECOM, 2019)

A Multi-User ACK-Aggregation Method for Large-Scale Reliable LoRaWAN Service. - Yohei Hasegawa; Kazuya Suzuki (ICC, 2019)

TCP throughput characteristics over 5G millimeterwave network in indoor train station. - Mayuko Okano; Yohei Hasegawa; Kenji Kanai; Bo Wei 001; Jiro Katto (WCNC, 2019)

Field Experiments of 28 GHz Band 5G System at Indoor Train Station Platform. - Mayuko Okano; Yohei Hasegawa; Kenji Kanai; Bo Wei 001; Jiro Katto (CCNC, 2020)

Bayesian-based channel quality estimation method for LoRaWAN with unpredictable interference. - Daichi Kominami; Yohei Hasegawa; Kosuke Nogami; Hideyuki Shimonishi; Masayuki Murata 001 (GLOBECOM, 2020)

Optical Communication Capacity and Quality to Maximize End-user TCP/IP Throughput. - Yohei Hasegawa; Morihiko Ota; Hidemi Noguchi (ICC, 2020)

Evaluation of the Link Budget Increase using Error-Tolerant TCPs for Optical Communication in Nonlinear Regime on 200G PM-16QAM Real-time Signal Demodulation. - Yohei Hasegawa; Hidemi Noguchi; Masaki Sato; Kohei Hosokawa; Morihiko Ota (ECOC, 2021)

AP Cooperative Mobility Control for Public Mesh Network. - Yudai Shibuya; Yohei Hasegawa; Hiroyasu Obata; Tutomu Murase (ICCE, 2023)

Free-Space Optical Communication System with Wide-Steering Beam for Terrestrial Access Networks. - Yohei Hasegawa; Atsushi Kamoi; Masaki Aizono; Takeshi Kato (ICC, 2024)