A 2 Gb/s Bi-Directional Inter-Chip Data Transceiver With Differential Inductors for High Density Inductive Channel Array. - Yoichi Yoshida; Noriyuki Miura; Tadahiro Kuroda (IEEE J. Solid State Circuits, 2008)

47% power reduction and 91% area reduction in inductive-coupling programmable bus for NAND flash memory stacking. - Mitsuko Saito; Yasufumi Sugimori; Yoshinori Kohama; Yoichi Yoshida; Noriyuki Miura; Hiroki Ishikuro; Tadahiro Kuroda (CICC, 2009)

MuCCRA-Cube: A 3D dynamically reconfigurable processor with inductive-coupling link. - Shotaro Saito; Yoshinori Kohama; Yasufumi Sugimori; Yohei Hasegawa; Hiroki Matsutani; Toru Sano; Kazutaka Kasuga; Yoichi Yoshida; Kiichi Niitsu; Noriyuki Miura; Tadahiro Kuroda; Hideharu Amano (FPL, 2009)

A 2Gb/s 15pJ/b/chip Inductive-Coupling programmable bus for NAND Flash memory stacking. - Yasufumi Sugimori; Yoshinori Kohama; Mitsuko Saito; Yoichi Yoshida; Noriyuki Miura; Hiroki Ishikuro; Takayasu Sakurai; Tadahiro Kuroda (ISSCC, 2009)

Wireless DC voltage transmission using inductive-coupling channelfor highly-parallel wafer-level testing. - Yoichi Yoshida; Koichi Nose; Yoshihiro Nakagawa; Koichiro Noguchi; Yasuhiro Morita; Masamoto Tago; Tadahiro Kuroda; Masayuki Mizuno (ISSCC, 2009)

A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications. - Tsutomu Takeya; Kazuhisa Sunaga; Koichi Yamaguchi; Hideyuki Sugita; Yoichi Yoshida; Masayuki Mizuno; Tadahiro Kuroda (CICC, 2010)

Analysis of Inductive Coupling and Design of Rectifier Circuit for Inter-Chip Wireless Power Link. - Yuxiang Yuan; Yoichi Yoshida; Tadahiro Kuroda (IEICE Trans. Electron., 2010)

2 Gb/s 15 pJ/b/chip Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. - Mitsuko Saito; Yasufumi Sugimori; Yoshinori Kohama; Yoichi Yoshida; Noriyuki Miura; Hiroki Ishikuro; Takayasu Sakurai; Tadahiro Kuroda (IEEE J. Solid State Circuits, 2010)

An Inductive-Coupling DC Voltage Transceiver for Highly Parallel Wafer-Level Testing. - Yoichi Yoshida; Koichi Nose; Yoshihiro Nakagawa; Koichiro Noguchi; Yasuhiro Morita; Masamoto Tago; Masayuki Mizuno; Tadahiro Kuroda (IEEE J. Solid State Circuits, 2010)

47% Power Reduction and 91% Area Reduction in Inductive-Coupling Programmable Bus for NAND Flash Memory Stacking. - Mitsuko Saito; Yoichi Yoshida; Noriyuki Miura; Hiroki Ishikuro; Tadahiro Kuroda (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

A 2.7Gb/s/mm2 0.9pJ/b/chip 1coil/channel ThruChip interface with coupled-resonator-based CDR for NAND Flash memory stacking. - Noriyuki Miura; Yasuhiro Take; Mitsuko Saito; Yoichi Yoshida; Tadahiro Kuroda (ISSCC, 2011)

6W/25mm2 inductive power transfer for non-contact wafer-level testing. - Andrzej Radecki; Hayun Chung; Yoichi Yoshida; Noriyuki Miura; Tsunaaki Shidei; Hiroki Ishikuro; Tadahiro Kuroda (ISSCC, 2011)

6 W/25 mm2 Wireless Power Transmission for Non-contact Wafer-Level Testing. - Andrzej Radecki; Hayun Chung; Yoichi Yoshida; Noriyuki Miura; Tsunaaki Shidei; Hiroki Ishikuro; Tadahiro Kuroda (IEICE Trans. Electron., 2012)