Reducing Parallel Linear Feedback Shift Register Complexity Through Input Tap Modification. - Xinmiao Zhang 001; Yok Jye Tang (ISCAS, 2019)

Low-Complexity Architectures for Parallel Long BCH Encoders. - Yok Jye Tang; Xinmiao Zhang 001 (SiPS, 2020)

Low-Complexity Parallel Cyclic Redundancy Check. - Xinmiao Zhang 001; Yok Jye Tang (ISCAS, 2021)

An Efficient Parallel Architecture for Resource-Shareable Reed-Solomon Encoder. - Yok Jye Tang; Xinmiao Zhang 001 (SiPS, 2021)

Efficient Reconfigurable Vandermonde Matrix Inverter for Erasure-Correcting Generalized Integrated Interleaved Decoding. - Yok Jye Tang; Xinmiao Zhang 001 (SiPS, 2022)

Fast En/Decoding of Reed-Solomon Codes for Failure Recovery. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE Trans. Computers, 2022)

Low-Complexity Resource-Shareable Parallel Generalized Integrated Interleaved Encoder. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Low-Latency Nested Decoding for Short Generalized Integrated Interleaved BCH Codes. - Zhenshan Xie; Yok Jye Tang; Xinmiao Zhang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Fast and Low-Complexity Soft-Decision Generalized Integrated Interleaved Decoder. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE J. Sel. Areas Inf. Theory, 2023)

Generalized Integrated Interleaved Codes for High-Density DRAMs. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Modified Extended Integrated Interleaved Codes. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE Commun. Lett., 2024)

Low-Complexity Parallel Chien Search Architecture Based on Vandermonde Matrix Decomposition. - Yok Jye Tang; Xinmiao Zhang 001 (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Three-Input Ciphertext Multiplication for Homomorphic Encryption. - Sajjad Akherati; Yok Jye Tang; Xinmiao Zhang 001 (ISCAS, 2025)

Low-Complexity Linear Feedback Shift Register Architecture For CRC En/Decoding. - Yok Jye Tang; Jiaxuan Cai; Xinmiao Zhang 001 (ISCAS, 2025)