New Trends in Microprocessor Architecture for Parallel Computing. - Xinfeng Xu; Yong Hei (FCST, 2010)

A Parallel-Layered Belief-Propagation Decoder for Non-layered LDPC Codes. - Kun Guo 001; Yong Hei; Shushan Qiao (J. Commun., 2010)

A novel channel estimation algorithm in OFDM power line communication system. - Huidong Zhao; Yong Hei; Shushan Qiao (ASICON, 2011)

A design of subthreshold SRAM cell based on RSCE and RNCE. - Jiangzheng Cai; Jia Yuan; Liming Chen 007; Yong Hei (ASICON, 2015)

A low voltage SRAM sense amplifier with offset cancelling using digitized multiple body biasing. - Bingyan Liu; Yong Hei (ASICON, 2015)

A Low Power, High Performance Analog Front-End Circuit for 1 V Digital Hearing Aid SoC. - Cheng-Ying Chen; Jun Fan; Xiao-Yu Hu; Yong Hei (Circuits Syst. Signal Process., 2015)

A 1-V, 1.2-mA fully integrated SoC for digital hearing aids. - Liming Chen 007; Zenghui Yu; Chengying Chen; Xiaoyu Hu; Jun Fan; Jun Yang; Yong Hei (Microelectron. J., 2015)

A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13μm CMOS process. - Chengying Chen; Liming Chen 007; Jun Fan; Zenghui Yu; Jun Yang; Xiaoyu Hu; Yong Hei; Feng Zhang 014 (ISCAS, 2016)

How to think about self-timed systems. - Marly Roncken; Ivan E. Sutherland; Chris Chen; Yong Hei; Warren A. Hunt Jr.; Cuong K. Chau; Swetha Mettala Gilla; Hoon Park; Xiaoyu Song; Anping He; Hong Chen 002 (ACSSC, 2017)

A PMOS read-port 8T SRAM cell with optimized leakage power and enhanced performance. - Jiangzheng Cai; Jia Yuan; Liming Chen 007; Chengying Chen; Yong Hei (IEICE Electron. Express, 2017)

A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes. - Yinghui Tian; Yong Hei; Zhizhe Liu; Zhixiong Di; Qi Shen 003; Zenghui Yu (IEICE Electron. Express, 2017)

Erratum: A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes [IEICE Electronics Express Vol. 14 (2017) No. 15 pp. 20170660]. - Yinghui Tian; Yong Hei; Zhizhe Liu; Zhixiong Di; Qi Shen 003; Zenghui Yu (IEICE Electron. Express, 2017)

An improved phase digitization mechanism for fast-locking low-power all-digital PLLs. - Lin-Lin Xie; Yang Wang; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2017)

A Low-Voltage SRAM Sense Amplifier With Offset Cancelling Using Digitized Multiple Body Biasing. - Bingyan Liu; Jiangzheng Cai; Jia Yuan; Yong Hei (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Click-Based Asynchronous Mesh Network with Bounded Bundled Data. - Anping He; Guangbo Feng; Jilin Zhang; Pengfei Li; Yong Hei; Hong Chen 002 (ICPP, 2018)

A low power and glitch-free circular rotation phase modulator for outphasing transmitter. - Yang Wang; Lin-Lin Xie; Yong Hei; Shushan Qiao (IEICE Electron. Express, 2018)

An anti-alias harmonic-reject phase modulation for digital outphasing transmitter. - Yang Wang; Lin-Lin Xie; Yong-sen Wang; Yong Hei; Shushan Qiao (IEICE Electron. Express, 2018)

A practical, low-overhead, one-cycle correction design method for variation-tolerant digital circuits. - Yi Yu; Jia Yuan; Lin-Lin Xie; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2018)

Design of low-power low-area asynchronous iterative multiplier. - Heng You; Yong Hei; Jia Yuan; Weidi Tang; Xu Bai; Shushan Qiao (IEICE Electron. Express, 2019)

An ultra-low leakage energy efficient level shifter with wide conversion range. - Heng You; Jia Yuan; Weidi Tang; Yi Yu; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2019)

A design method of CPR for wide voltage design. - Yi Yu; Zhi-jiu Zhu; Heng You; Jia Yuan; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2019)

Snake: An asynchronous pipeline for ultra-low-power applications. - Zhi-jiu Zhu; Yi Yu; Xu Bai; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2019)

A low-overhead error detection and correction technique with a relaxed error timing constraint for variation-tolerance. - Zhi-jiu Zhu; Yi Yu; Xu Bai; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2019)

A Modified Signal Flow Graph and Corresponding Conflict-Free Strategy for Memory-Based FFT Processor Design. - Yinghui Tian; Yong Hei; Zhizhe Liu; Qi Shen 003; Zhixiong Di; Tao Chen 007 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Erratum: Snake: An asynchronous pipeline for ultra-low-power applications [IEICE Electronics Express Vol. 16 (2019) No. 12 pp. 20190293]. - Zhi-jiu Zhu; Yi Yu; Xu Bai; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2020)

Erratum: A low-overhead error detection and correction technique with a relaxed error timing constraint for variation-tolerance [IEICE Electronics Express Vol. 16 (2019) No. 14 pp. 20190342]. - Zhi-jiu Zhu; Yi Yu; Xu Bai; Shushan Qiao; Yong Hei (IEICE Electron. Express, 2020)

An Energy-Efficient Level Shifter for Ultra Low-Voltage Digital LSIs. - Heng You; Jia Yuan; Weidi Tang; Shushan Qiao; Yong Hei (IEEE Trans. Circuits Syst., 2020)