Research and Implementation of a 32-Bit Asynchronous Multiplier. - Yong Li 006; Lei Wang 011; Rui Gong; Kui Dai; Zhiying Wang 003 (J. Comput. Res. Dev., 2006)

A Low-Power Application Specific Instruction Set Processor Using Asynchronous Function Units. - Yong Li 006; Zhiying Wang 003; Kui Dai (CIT, 2007)

Design of a Low-Power Embedded Processor Architecture Using Asynchronous Function Units. - Yong Li 006; Zhiying Wang 003; Xue-mi Zhao; Jian Ruan; Kui Dai (Asia-Pacific Computer Systems Architecture Conference, 2007)

A Low-Power Globally Synchronous Locally Asynchronous FFT Processor. - Yong Li 006; Zhiying Wang 003; Jian Ruan; Kui Dai (HPCC, 2007)

Latency Estimation of the Asynchronous Pipeline Using the Max-Plus Algebra. - Jian Ruan; Zhiying Wang 003; Kui Dai; Yong Li 006 (International Conference on Computational Science (4), 2007)

Design and Test of Self-checking Asynchronous Control Circuit. - Jian Ruan; Zhiying Wang 003; Kui Dai; Yong Li 006 (PATMOS, 2007)