19.3 A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS. - Hyunik Kim; Yongjo Kim; Taeik Kim; Hojin Park; SeongHwan Cho (ISSCC, 2016)

A 2.4-GHz 1.5-mW Digital Multiplying Delay-Locked Loop Using Pulsewidth Comparator and Double Injection Technique. - Hyunik Kim; Yongjo Kim; Taeik Kim; Hyung Jong Ko; SeongHwan Cho (IEEE J. Solid State Circuits, 2017)

A 2.3-mW 0.01-mm2 1.25-GHz Quadrature Signal Corrector With 1.1-ps Error for Mobile DRAM Interface in 65-nm CMOS. - Yongjo Kim; Keunsoo Song; Dongkyun Kim; SeongHwan Cho (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Jitter-Programmable Bang-Bang Phase-Locked Loop Using PVT Invariant Stochastic Jitter Monitor. - Yongjo Kim; Taekwang Jang; SeongHwan Cho (A-SSCC, 2023)

A Jitter Programmable Digital Bang-Bang PLL Using PVT-Invariant Stochastic Jitter Monitor. - Yongjo Kim; Taekwang Jang; SeongHwan Cho (IEEE J. Solid State Circuits, 2024)