Balancing Thread Partition for Efficiently Exploiting Speculative Thread-Level Parallelism. - Yaobin Wang; Hong An; Bo Liang; Li Wang; Ming Cong; Yongqing Ren (APPT, 2007)

Profile guided optimization for dataflow predication. - Li Wang; Hong An; Yongqing Ren; Yaobin Wang (ACSAC, 2008)

A wire delay scalable stream processor architecture. - Guang Xu; Hong An; Ming Cong; Fang Wang; Yongqing Ren (ACSAC, 2008)

Scaling the Performance of Tiled Processor Architectures with On-Chip-Network Topology. - Yongqing Ren; Hong An; Ming Cong; Guang Xu; Li Wang (CSO (1), 2009)

Fuzhou University at TRECVID 2009. - Jianjun Huang 004; Changjin Gao; Qijian Zheng; Yulong Yan; Yongqing Ren (TRECVID, 2009)

Dynamic Resource Tuning for Flexible Core Chip Multiprocessors. - Yongqing Ren; Hong An; Tao Sun; Ming Cong; Yaobin Wang (ICA3PP (2), 2010)

FACRA: Flexible-Core Architecture Chip Resource Abstractor. - Tao Sun; Hong An; Yongqing Ren; Mengjie Mao; Yang Liu; Mu Xu; Qi Li 034 (PDCAT, 2010)

Integrating Prefetcher Selection with Dynamic Request Allocation Improves Prefetching Efficiency. - Mengming Li; Qijun Zhang; Yongqing Ren; Zhiyao Xie (HPCA, 2025)

Profile-Guided Temporal Prefetching. - Mengming Li; Qijun Zhang; Yichuan Gao; Wenji Fang; Yao Lu; Yongqing Ren; Zhiyao Xie (ISCA, 2025)