A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization. - Juyeop Kim; Heein Yoon; Younghyun Lim; Yongsun Lee; Yoonseo Cho; Taeho Seong; Jaehyouk Choi (ISSCC, 2019)

An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators. - Juyeop Kim; Younghyun Lim; Heein Yoon; Yongsun Lee; Hangi Park; Yoonseo Cho; Taeho Seong; Jaehyouk Choi (IEEE J. Solid State Circuits, 2019)

An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier- Based Phase Detector in 65nm CMOS. - Seyeon Yoo; Suneui Park; Seojin Choi; Yoonseo Cho; Heein Yoon; Chanwoong Hwang; Jaehyouk Choi (ISSCC, 2021)

An Ultra-Low Jitter, Low-Power, 102-GHz PLL Using a Power-Gating Injection-Locked Frequency Multiplier-Based Phase Detector. - Suneui Park; Seojin Choi; Seyeon Yoo; Yoonseo Cho; Jaehyouk Choi (IEEE J. Solid State Circuits, 2022)

A 0.009mm2, 6.5mW, 6.2b-ENOB 2.5GS/s Flash-and-VCO-Based Subranging ADC Using a Resistor-Ladder-Based Residue Shifter. - Jeonghyun Lee; Yoonseo Cho; Jintae Kim; Jaehyouk Choi (CICC, 2023)

A 122fsrms-Jitter and -60dBc-Reference-Spur 12.24GHz MDLL with a 102 - Multiplication Factor Using a Power-Gating Technique. - Yoonseo Cho; Jeonghyun Lee; Suneui Park; Seyeon Yoo; Jaehyouk Choi (VLSI Technology and Circuits, 2023)

Unicorn: U-Net for Sea Ice Forecasting with Convolutional Neural Ordinary Differential Equations. - Jaesung Park; Sungchul Hong; Yoonseo Cho; Jong-June Jeon (CoRR, 2024)

22.2: An 850µW 2-to-5GHz Jitter-Filtering and Instant-Toggling Injection-Locked Quadrature-Clock Generator for Low-Power Clock Distribution in HBM Interfaces. - Jeongbeom Seo; Yoonseo Cho; Yuhwan Shin; Jaehyouk Choi (ISSCC, 2025)

A 12.24-GHz MDLL With a 102-Multiplication Factor Using a Power-Gating-Based Ring Oscillator. - Yoonseo Cho; Jeonghyun Lee; Suneui Park; Seyeon Yoo; Jaehyouk Choi (IEEE J. Solid State Circuits, 2025)