Scalable FPGA-array for high-performance and power-efficient computation based on difference schemes. - Kentaro Sano; Luzhou Wang; Yoshiaki Hatsuda; Satoru Yamamoto (HPRCTA@SC, 2008)

FPGA-Array with Bandwidth-Reduction Mechanism for Scalable and Power-Efficient Numerical Simulations Based on Finite Difference Methods. - Kentaro Sano; Luzhou Wang; Yoshiaki Hatsuda; Takanori Iizuka; Satoru Yamamoto (ACM Trans. Reconfigurable Technol. Syst., 2010)

Scalable Streaming-Array of Simple Soft-Processors for Stencil Computations with Constant Memory-Bandwidth. - Kentaro Sano; Yoshiaki Hatsuda; Satoru Yamamoto (FCCM, 2011)

Domain-specific programmable design of scalable streaming-array for power-efficient stencil computation. - Kentaro Sano; Satoru Yamamoto; Yoshiaki Hatsuda (SIGARCH Comput. Archit. News, 2011)

Multi-FPGA Accelerator for Scalable Stencil Computation with Constant Memory Bandwidth. - Kentaro Sano; Yoshiaki Hatsuda; Satoru Yamamoto (IEEE Trans. Parallel Distributed Syst., 2014)