Pulse-type hardware neuron model using a lambda (Λ)-shaped transistor and its application. - Yoshifumi Sekine; Masatoshi Suyama; Masayoshi Noguchi; Tohru Ito (Syst. Comput. Jpn., 1987)

Presumption of gating system by sodium activation gating model. - Yoshifumi Sekine; Kenji Narumi; Masatoshi Suyama; Masayoshi Noguchi (Syst. Comput. Jpn., 1989)

Spatial feature detection using a pulse-type hardware neuron model. - Yoshifumi Sekine; Masatoshi Suyama; Atsushi Muramatsu (Syst. Comput. Jpn., 1989)

Two kinds of pulse-type hardware neuron models and their application to recognition circuits. - Yoshifumi Sekine; Takeshi Kanai; Takehiko Amamori; Shinya Takahashi; Chie Takeuchi (Syst. Comput. Jpn., 1992)

A study on the bursting firing phenomena in neural network with the hardware neuron model. - Kazutaka Someya; Eiko Miyata; Yoshifumi Sekine (ICNN, 1995)

Internal states of pulse-type hardware neuron model with chaotic dynamics. - Kazutaka Someya; Hidekazu Shinozaki; Eiko Miyata; Yoshifumi Sekine (ICNN, 1996)

Effects on an Active Feature on Neurodynamics and Chaotic Phenomena by Active Axon. - Kazutaka Someya; Atsushi Fujita; Katsutoshi Saeki; Yoshifumi Sekine; Kazuyuki Aihara (ICONIP, 1998)

Temporal Pattern Discrimination Using the Brain Mimic Processor. - Sei Takahashi; Hiroshi Hakoda; Yoshifumi Sekine (ICONIP, 1998)

Chaotic phenomena of an active axon. - Kazutaka Someya; Atsushi Fujita; Yoshifumi Sekine; Kawyuki Aihara (IJCNN, 1999)

Pulse-type hardware chaotic neuron model and its bifurcation phenomena. - Kazutaka Someya; Hidekazu Shinozaki; Yoshifumi Sekine (Neural Networks, 1999)

Noise Reduction Approach of Range Image Using Nonlinear 2D Kalman Filter. - Jun Katayama; Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Analog Hardware Implementation of a Mathematical Model of an Asynchronous Chaotic Neuron. - Jun Matsuoka; Yoshifumi Sekine; Katsutoshi Saeki; Kazuyuki Aihara (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

CMOS Implementation of Neuron Models for an Artificial Auditory Neural Network. - Katsutoshi Saeki; Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

A Consideration on Very Low Phase Noise Oscillator Circuit. - Yukinori Sakuta; Yuji Arai; Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

Foreword. - Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

A Minimal Modeling of Neuronal Burst-Firing Based on Bifurcation Analysis. - Vasileios Tserolas; Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

A Study of Nonlinear Characteristics in a Hardware Active Dendrite Model. - Zongyang Xue; Haruki Nagami; Kazutaka Someya; Katsutoshi Saeki; Yoshifumi Sekine (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2003)

A Basilar Membrane Model Using Simulink for Hearing-Aid Systems. - Tetsuya Tsukada; Yoshifumi Sekine (ICONIP, 2004)

A neural net architecture for hardware implementation of a temporal pattern discrimination model. - Sei Takahashi; Yoshifumi Sekine (Syst. Comput. Jpn., 2004)

Short-term memory circuit using hardware ring neural networks. - Naoya Sasano; Katsutoshi Saeki; Yoshifumi Sekine (Artif. Life Robotics, 2005)

Extraction of Phase Information Buried in Fluctuation of a Pulse-type Hardware Neuron Model Using STDP. - Katsutoshi Saeki; Yugo Hayashi; Yoshifumi Sekine (IJCNN, 2006)

Pulse-Type Neuro Devices with Spike Timing Dependent Synaptic Plasticity. - Katsutoshi Saeki; Yugo Hayashi; Yoshifumi Sekine (BIODEVICES (1), 2008)

Pulse-Type Hardware Neural Network with Two Time Windows in STDP. - Katsutoshi Saeki; Ryo Shimizu; Yoshifumi Sekine (ICONIP (2), 2008)

Synchronization of coupled pulse-type hardware neuron models for CPG model. - Ken Saito; Katsutoshi Saeki; Yoshifumi Sekine (IJCNN, 2009)

Pulse-type Neuro Devices with Two Time Windows in STDP and its Application to the Memory of Temporal Sequences Patterns. - Katsutoshi Saeki; Shingo Watanabe; Toshiharu Morita; Yoshifumi Sekine (BIODEVICES, 2011)

Pulse-Type Hardware Inhibitory Neural Networks for MEMS micro robot using CMOS technology. - Ken Saito; Kazuto Okazaki; Kentaro Sakata; Tatsuya Ogiwara; Yoshifumi Sekine; Fumio Uchikoba (IJCNN, 2011)

Associative memory using pulse-type hardware neural network with STDP synapses. - Katsutoshi Saeki; Toshiharu Morita; Yoshifumi Sekine (ISDA, 2011)

Development of a pulse control-type MEMS microrobot with a hardware neural network. - Kazuto Okazaki; Tatsuya Ogiwara; Dongshin Yang; Kentaro Sakata; Ken Saito; Yoshifumi Sekine; Fumio Uchikoba (Artif. Life Robotics, 2011)

A study on CPG model transition swing and stance pattern with interstitial cells. - Katsutoshi Saeki; Tatsuya Tatebe; Yoshifumi Sekine (IJCNN, 2012)

IC chip of pulse-type hardware neural networks for hexapod walking MEMS micro robot. - Ken Saito; Shiho Takahama; Shinpei Yamasaki; Minami Takato; Yoshifumi Sekine; Fumio Uchikoba (IJCNN, 2013)

A study on gas sensors using a SAW device. - Katutoshi Sugiyama; Katsutoshi Saeki; Minoru Saito Nihon; Yoshifumi Sekine (APCCAS, 2014)

IC implementation of spike-timing-dependent synaptic plasticity model using low capacitance value. - Daichi Yamashita; Katsutoshi Saeki; Yoshifumi Sekine (APCCAS, 2014)

Artificial neural circuit integration for MEMS microrobot system. - Ken Saito; Yuki Ishihara; Kazuki Sugita; Yuki Okane; Hirozumi Oku; Yohei Asano; Kei Iwata; Masaki Tatani; Minami Takato; Yoshifumi Sekine; Fumio Uchikoba (AIM, 2015)

Development of quadruped robot with locomotion rhythm generator using pulse-type hardware neural networks. - Ken Saito; Yuki Ikeda; Minami Takato; Yoshifumi Sekine; Fumio Uchikoba (Artif. Life Robotics, 2015)