Symbolic Layout System: Application Results and Functional Improvements. - Masayuki Terai; Yoshihide Ajioka; Tomoyoshi Noda; Masaru Ozaki; Tsunenori Umeki; Koji Sato (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

A half-pel precision MPEG2 motion-estimation processor with concurrent three-vector search. - Kazuya Ishihara; Shinichi Masuda; Shin-ichi Hattori; Hirofumi Nishikawa; Yoshihide Ajioka; Tsuyoshi Yamada; Hiroyuki Amishiro; Shin-ichi Uramoto; Masahiko Yoshimoto; Tadashi Sumi (IEEE J. Solid State Circuits, 1995)

A 99-mm2, 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system. - Satoshi Kumaki; Hidehiro Takata; Yoshihide Ajioka; Tsukasa Ooishi; Kazuya Ishihara; Atsuo Hanami; Takaharu Tsuji; Yusuke Kanehira; Tetsuya Watanabe; Chikayoshi Morishima; Tomoaki Yoshizawa; Hidenori Sato; et al. (CICC, 2001)

A 99-mm2 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system. - Satoshi Kumaki; Hidehiro Takata; Yoshihide Ajioka; Tsukasa Ooishi; Kazuya Ishihara; Atsuo Hanami; Takaharu Tsuji; Tetsuya Watanabe; Chikayoshi Morishima; Tomoaki Yoshizawa; Hidenori Sato; Shin-ichi Hattori; et al. (IEEE J. Solid State Circuits, 2002)

A Method of Precise Estimation of Physical Parameters in LSI Interconnect Structures. - Toshiki Kanamoto; Tetsuya Watanabe; Mitsutoshi Shirota; Masayuki Terai; Tatsuya Kunikiyo; Kiyoshi Ishikawa; Yoshihide Ajioka; Yasutaka Horiba (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005)