A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. - Yoshiki Saito; Toru Sano; Masaru Kato; Vasutan Tunbunheng; Yoshihiro Yasuda; Hideharu Amano (ERSA, 2009)

MuCCRA-3: a low power dynamically reconfigurable processor array. - Yoshiki Saito; Toru Sano; Masaru Kato; Vasutan Tunbunheng; Yoshihiro Yasuda; Masayuki Kimura; Hideharu Amano (ASP-DAC, 2010)

Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping. - Kazuei Hironaka; Masayuki Kimura; Yoshiki Saito; Toru Sano; Masaru Kato; Vasutan Tunbunheng; Yoshihiro Yasuda; Hideharu Amano (FPT, 2010)

Cool Mega-Array: A highly energy efficient reconfigurable accelerator. - Nobuaki Ozaki; Yoshihiro Yasuda; Yoshiki Saito; Daisuke Ikebuchi; Masayuki Kimura; Hideharu Amano; Hiroshi Nakamura; Kimiyoshi Usami; Mitaro Namiki; Masaaki Kondo (FPT, 2011)

Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips. - Nobuaki Ozaki; Yoshihiro Yasuda; Mai Izawa; Yoshiki Saito; Daisuke Ikebuchi; Hideharu Amano; Hiroshi Nakamura; Kimiyoshi Usami; Mitaro Namiki; Masaaki Kondo (IEEE Micro, 2011)

CMA-2 : The second prototype of a low power reconfigurable accelerator. - Mai Izawa; Nobuaki Ozaki; Yoshihiro Yasuda; Masayuki Kimura (ASP-DAC, 2012)