Design of a high gain regulator by the multiple time scale approach. - Satoshi Murata; Yoshinori Ando; Masayuki Suzuki (Autom., 1990)

An Application of the Modified PID Control System for Heat Flow Experiment. - Takaaki Hagiwara; Kou Yamada; Iwanori Murakami; Yoshinori Ando; Shun Matsuura; Satoshi Aoyama (Int. J. Autom. Technol., 2010)

Production of carbon nanotubes. - Yoshinori Ando (MHS, 2012)

Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS. - Tatsuya Onuki; Wataru Uesugi; Hikaru Tamura; Atsuo Isobe; Yoshinori Ando; Satoru Okamoto; Kiyoshi Kato; Tri Rung Yew; Chen Bin Lin; J. Y. Wu; Chi Chang Shuai; Shao Hui Wu; et al. (VLSI Circuits, 2016)

Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS. - Tatsuya Onuki; Wataru Uesugi; Atsuo Isobe; Yoshinori Ando; Satoru Okamoto; Kiyoshi Kato; Tri Rung Yew; J. Y. Wu; Chi Chang Shuai; Shao Hui Wu; James Myers; Klaus Doppler; et al. (IEEE J. Solid State Circuits, 2017)

A 20ns-write 45ns-read and 1014-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors. - Shuhei Maeda; Satoru Ohshita; Kazuma Furutani; Yuto Yakubo; Takahiko Ishizu; Tomoaki Atsumi; Yoshinori Ando; Daisuke Matsubayashi; Kiyoshi Kato; Takashi Okuda; Masahiro Fujita; Shunpei Yamazaki (ISSCC, 2018)

A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs. - Takahiko Ishizu; Yuto Yakubo; Kazuma Furutani; Atsuo Isobe; Masashi Fujita; Tomoaki Atsumi; Yoshinori Ando; Tsutomu Murakawa; Kiyoshi Kato; Masahiro Fujita; Shunpei Yamazaki (VLSI Circuits, 2019)

Soft- and Hard-Error Radiation Reliability of 228 KB $3 mathrm{T}+1 mathrm{C}$ Oxide Semiconductor Memory. - H. Takahashi; Y. Okamoto; Toshiki Hamada; Yusuke Komura; S. Watanabe; K. Tsuda; H. Sawai; Takanori Matsuzaki; Yoshinori Ando; Tatsuya Onuki; Hitoshi Kunitake; Shunpei Yamazaki; et al. (IRPS, 2023)

Crystalline Oxide Semiconductor-based 3D Bank Memory System for Endpoint Artificial Intelligence with Multiple Neural Networks Facilitating Context Switching and Power Gating. - Yuto Yakubo; Kazuma Furutani; Kouhei Toyotaka; Haruki Katagiri; Masashi Fujita; Munehiro Kozuma; Yoshinori Ando; Yoshiyuki Kurokawa; Toru Nakura; Shunpei Yamazaki (ISSCC, 2023)

1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS. - Yuki Okamoto; Yusuke Komura; Toshiki Mizuguchi; Toshihiko Saito; Minato Ito; K. Kimura; Tatsuya Onuki; Yoshinori Ando; Hiromi Sawai; Tsutomu Murakawa; Hitoshi Kunitake; Takanori Matsuzaki; et al. (VLSI Technology and Circuits, 2023)

Heterogeneous Oxide Semiconductor FETs Comprising Planar FET and Vertical Channel FETs Monolithically Stacked on Si CMOS, Enabling 1-Mbit 3D DRAM. - Hiraki Inoue; Takeya Hirose; Toshiki Mizuguchi; Yusuke Komura; Toshihiko Saito; Minato Ito; Kiyotaka Kimura; Tatsuya Onuki; Yoshinori Ando; Hiromi Sawai; Tsutomu Murakawa; Hitoshi Kunitake; et al. (IMW, 2024)