Auto Correction Feedback for Ripple Suppression in a Chopper Amplifier. - Yoshinori Kusuda (IEEE J. Solid State Circuits, 2010)

A 5.9nV/√Hz chopper operational amplifier with 0.78μV maximum offset and 28.3nV/°C offset drift. - Yoshinori Kusuda (ISSCC, 2011)

5.1 A 60V auto-zero and chopper operational amplifier with 800kHz interleaved clocks and input bias-current trimming. - Yoshinori Kusuda (ISSCC, 2015)

A 60 V Auto-Zero and Chopper Operational Amplifier With 800 kHz Interleaved Clocks and Input Bias Current Trimming. - Yoshinori Kusuda (IEEE J. Solid State Circuits, 2015)

A 5.6 nV/ √Hz Chopper Operational Amplifier Achieving a 0.5 μV Maximum Offset Over Rail-to-Rail Input Range With Adaptive Clock Boosting Technique. - Yoshinori Kusuda (IEEE J. Solid State Circuits, 2016)

Techniques of Reducing Switching Artifacts in Chopper Amplifiers. - Yoshinori Kusuda (IEICE Trans. Electron., 2020)

31.4 A Chopper-Stabilized Amplifier with -107dB IMD and 28dB Suppression of Chopper-Induced IMD. - Thije Rooijers; Shoubhik Karmakar; Yoshinori Kusuda; Johan H. Huijsing; Kofi A. A. Makinwa (ISSCC, 2021)

A Fill-In Technique for Robust IMD Suppression in Chopper Amplifiers. - Thije Rooijers; Shoubhik Karmakar; Yoshinori Kusuda; Johan H. Huijsing; Kofi A. A. Makinwa (IEEE J. Solid State Circuits, 2021)