A 0.5 V 2.5 μW/MHz Microcontroller with Analog-Assisted Adaptive Body Bias PVT Compensation with 3.13nW/kB SRAM Retention in 55nm Deeply-Depleted Channel CMOS. - Marc Pons 001; Christoph Thomas Müller; David Ruffieux; Jean-Luc Nagel; Stéphane Emery; Andreas Burg 001; Shuuji Tanahashi; Yoshitaka Tanaka; Atsushi Takeuchi (CICC, 2019)

Minimum Energy Point in Constant Frequency Designs under Adaptive Supply Voltage and Body Bias Adjustment in 55 nm DDC. - Christoph Thomas Müller; Marc Pons 001; David Ruffieux; Jean-Luc Nagel; Stéphane Emery; Andreas Burg 001; Shuuji Tanahashi; Yoshitaka Tanaka; Atsushi Takeuchi (PRIME, 2019)