A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor. - Noriyuki Ito; Hiroaki Komatsu; Yoshiyasu Tanamura; Ryoichi Yamashita; Hiroyuki Sugiyama; Yaroku Sugiyama; Hirofumi Hamamura (ICCD, 2003)

Diagonal routing in high performance microprocessor design. - Noriyuki Ito; Hideaki Katagiri; Ryoichi Yamashita; Hiroshi Ikeda; Hiroyuki Sugiyama; Hiroaki Komatsu; Yoshiyasu Tanamura; Akihiro Yoshitake; Kazuhiro Nonomura; Kinya Ishizaka; Hiroaki Adachi; Yutaka Mori; et al. (ASP-DAC, 2006)

Design Methodology for 2.4GHz Dual-Core Microprocessor. - Noriyuki Ito; Hiroaki Komatsu; Akira Kanuma; Akihiro Yoshitake; Yoshiyasu Tanamura; Hiroyuki Sugiyama; Ryoichi Yamashita; Ken-ichi Nabeya; Hironobu Yoshino; Hitoshi Yamanaka; Masahiro Yanagida; Yoshitomo Ozeki; et al. (ASP-DAC, 2007)