FPGA-based ultra-low latency background remover. - Yoshiyuki Oshima; Yoshiki Yamaguchi; Ryouhei Tsugami; Toshihito Fujiwara; Tatsuya Fukui; Satoshi Narikawa (ICCE, 2024)

FPGA-Based Improved Background Subtraction for Ultra-Low Latency. - Yoshiyuki Oshima; Yoshiki Yamaguchi; Ryouhei Tsugami; Toshihito Fujiwara; Tatsuya Fukui; Satoshi Narikawa (IEEE Access, 2024)