Intra mode power saving methodology for CGRA-based reconfigurable processor architectures. - Narasinga Rao Miniskar; Rahul R. Patil; Raj Narayana Gadde; Young-chul Rams Cho; Sukjin Kim; Shi Hwa Lee (ISCAS, 2016)

Fast cycle-accurate compile based simulator for reconfigurable processor. - Narasinga Rao Miniskar; Raj Narayana Gadde; Young-chul Rams Cho; Sukjin Kim (ISCAS, 2017)