A single-chip programmable platform based on a multithreaded processor and configurable logic clusters. - Young-Don Bae; Seong-Il Park; In-Cheol Park (IEEE J. Solid State Circuits, 2003)

A low-power graphics LSI integrating 29Mb embedded DRAM for mobile multimedia applications. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Young-Don Bae; Hoi-Jun Yoo (ASP-DAC, 2004)

A 4.75GOPS single-chip programmable processor array consisting of a multithreaded processor and multiple SIMD and IO processors. - Young-Don Bae; In-Cheol Park (CICC, 2004)

A low-power 3D rendering engine with two texture units and 29-Mb embedded DRAM for 3G multimedia terminals. - Ramchan Woo; Sungdae Choi; Ju-Ho Sohn; Seong-Jun Song; Young-Don Bae; Hoi-Jun Yoo (IEEE J. Solid State Circuits, 2004)