eDRAM-based tiered-reliability memory with applications to low-power frame buffers. - Kyungsang Cho; Yongjun Lee; Young H. Oh; Gyoo-Cheol Hwang; Jae W. Lee (ISLPED, 2014)

Developing Automated Input Generator for Android Mobile Device to Evaluate Malware Behavior. - Shobhit N. Dutia; Tae H. Oh; Young H. Oh (RIIT, 2015)

Short-Circuit Dispatch: Accelerating Virtual Machine Interpreters on Embedded Processors. - Channoh Kim; Sungmin Kim; Hyeon-Gyu Cho; Doo-Young Kim; Jaehyeok Kim; Young H. Oh; Hakbeom Jang; Jae W. Lee (ISCA, 2016)

An eDRAM-Based Approximate Register File for GPUs. - Donghwan Jeong; Young H. Oh; Jae W. Lee; Yongjun Park 001 (IEEE Des. Test, 2016)

Typed Architectures: Architectural Support for Lightweight Scripting. - Channoh Kim; Jaehyeok Kim; Sungmin Kim; Doo-Young Kim; Namho Kim; Gitae Na; Young H. Oh; Hyeon-Gyu Cho; Jae W. Lee (ASPLOS, 2017)

A portable, automatic data qantizer for deep neural networks. - Young H. Oh; Quan Quan; Daeyeon Kim; Seonghak Kim; Jun Heo 001; Sungjun Jung; Jaeyoung Jang; Jae W. Lee (PACT, 2018)

A3: Accelerating Attention Mechanisms in Neural Networks with Approximation. - Tae Jun Ham; Sungjun Jung; Seonghak Kim; Young H. Oh; Yeonhong Park; Yoonho Song; Jung-Hun Park; Sanghee Lee 002; Kyoung Park; Jae W. Lee; Deog-Kyoon Jeong (HPCA, 2020)

Genesis: A Hardware Acceleration Framework for Genomic Data Analysis. - Tae Jun Ham; David Bruns-Smith; Brendan Sweeney; Yejin Lee 001; Seong Hoon Seo; U. Gyeong Song; Young H. Oh; Krste Asanovic; Jae W. Lee; Lisa Wu Wills (ISCA, 2020)

Layerweaver: Maximizing Resource Utilization of Neural Processing Units via Layer-Wise Scheduling. - Young H. Oh; Seonghak Kim; Yunho Jin; Sam Son; Jonghyun Bae; Jongsung Lee 001; Yeonhong Park; Dong Uk Kim; Tae Jun Ham; Jae W. Lee (HPCA, 2021)

An 8-bit Ring-Amplifier Based Mixed-Signal MAC Circuit With Full Digital Interface and Variable Accumulation Length. - Jongho Kim; Beomkyu Seo; Young H. Oh; Jung-Hoon Chun; Jae W. Lee; Jintae Kim (IEEE Access, 2021)

Accelerating Genomic Data Analytics With Composable Hardware Acceleration Framework. - Tae Jun Ham; Yejin Lee 001; Seong Hoon Seo; U. Gyeong Song; Jae W. Lee; David Bruns-Smith; Brendan Sweeney; Krste Asanovic; Young H. Oh; Lisa Wu Wills (IEEE Micro, 2021)

Layerweaver+: A QoS-Aware Layer-Wise DNN Scheduler for Multi-Tenant Neural Processing Units. - Young H. Oh; Yunho Jin; Tae Jun Ham; Jae W. Lee (IEICE Trans. Inf. Syst., 2022)

A 4-bit 4.5-ns-Latency Pseudo-ReRAM Computing-In-Memory Macro With Self Error-Correcting DTC-Based WL Drivers and 6-bit CDAC-Less Column ADCs Having Ultra-Narrow Pitch. - Jongho Kim; Young H. Oh; Hyeonsik Kim; Jae W. Lee; Jintae Kim (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Angular Distance-Guided Neighbor Selection for Graph-Based Approximate Nearest Neighbor Search. - Sungjun Jung; Yongsang Park; Haeun Lee; Young H. Oh; Jae W. Lee (WWW, 2025)