A 10-b 150-MSample/s 1.8-V 123-mW CMOS A/D converter with 400-MHz input bandwidth. - Jong-Bum Park; Sang-Min Yoo; Se-Won Kim; Young-Jae Cho; Seung-Hoon Lee 006 (IEEE J. Solid State Circuits, 2004)

An 8b 240 MS/s 1.36 mm2 104 mW 0.18 um CMOS ADC for DVDs with dual-mode inputs. - Se-Won Kim; Young-Jae Cho; Kyung-Hoon Lee; Seung-Hoon Lee 006; Jae-Yup Lee; Hyun-Chul Noh; Hee-Sub Lee (ISCAS (4), 2005)

An 8b 220 MS/s 0.25 µm CMOS Pipeline ADC with On-Chip RC-Filter Based Voltage References. - Young-Jae Cho; Hyuen-Hee Bae; Seung-Hoon Lee 006 (IEICE Trans. Electron., 2005)

An 11b 70-MHz 1.2-mm2 49-mW 0.18-μm CMOS ADC with on-chip current/voltage references. - Young-Jae Cho; Seung-Hoon Lee 006 (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

A Dual-Channel 6b 1GS/s 0.18um CMOS ADC for Ultra Wide-Band Communication Systems. - Young-Jae Cho; Kyung-Hoon Lee; Hee-Cheol Choi; Young-Ju Kim; Kyoung-Jun Moon; Seung-Hoon Lee 006; Seok-Bong Hyun; Seong-Su Park (APCCAS, 2006)

A 14b 100MS/s 3.4mm2 145mW 0.18um CMOS Pipeline A/D Converter. - Kyung-Hoon Lee; Young-Jae Cho; Hee-Cheol Choi; Yong-Hyun Park; Doo-Hwan Sa; Young-Lok Kim; Seung-Hoon Lee 006 (APCCAS, 2006)

A Calibration-Free 14b 70MS/s 3.3mm2 235mW 0.13um CMOS Pipeline ADC with High-Matching 3-D Symmetric Capacitors. - Young-Jae Cho; Kyung-Hoon Lee; Hee-Cheol Choi; Seung-Hoon Lee 006; Kyoung-Ho Moon; Jae-Whui Kim (CICC, 2006)

A 10b 25MS/s 4.8mW 0.13um CMOS ADC for Digital Multimedia Broadcasting Applications. - Young-Jae Cho; Doo-Hwan Sa; Yong-Woo Kim; Kyung-Hoon Lee; Hee-Cheol Choi; Seung-Hoon Lee 006; Young-Deuk Jeon; Seung-Chul Lee; Jong-Kee Kwon (CICC, 2006)

An Embedded 8b 240 MS/s 1.36 mm2 104 mW 0.18 µCMOS ADC for DVDs with Dual-Mode Inputs. - Young-Jae Cho; Se-Won Kim; Kyung-Hoon Lee; Hee-Cheol Choi; Young-Lok Kim; Seung-Hoon Lee 006 (IEICE Trans. Electron., 2006)

A 10b 100 MS/s 1.4 mm256 mW 0.18 µm CMOS A/D Converter with 3-D Fully Symmetrical Capacitors. - Byoung-Han Min; Young-Jae Cho; Hee-Sung Chae; Hee-Won Park; Seung-Hoon Lee 006 (IEICE Trans. Electron., 2006)

A 10 b 200 MS/s 1.8 mm2 83 mW 0.13µm CMOS ADC Based on Highly Linear Integrated Capacitors. - Young-Ju Kim; Young-Jae Cho; Doo-Hwan Sa; Seung-Hoon Lee 006 (IEICE Trans. Electron., 2007)

A Digital Product Memory Architecture for Cars. - Young-Jae Cho; Florian Kuttig; Markus Strassberger; Jörg Preißinger (SemProM, 2013)

Capturing Sensor Data in the SemProM Automotive Scenario. - Young-Jae Cho; Jörg Preißinger (SemProM, 2013)

An Input-buffer Embedding Dual-residue Pipelined-SAR ADC with Nonbinary Capacitive Interpolation. - Seung-Yong Lim; Raymond Mabilangan; Dong-Jin Chang; Young-Jae Cho; Michael Choi; Seung-Tak Ryu (A-SSCC, 2021)

A 12-bit 10GS/s 16-Channel Time-Interleaved ADC with a Digital Processing Timing-Skew Background Calibration in 5nm FinFET. - Kyoung-Jun Moon; Dong-Ryeol Oh; Young-Hyo Park; Kyung-Hoon Lee; Sun-Jae Park; Sung-No Lee; Hee-Chang Hwang; Hyo-Chul Shin; Young-Jae Cho; Michael Choi; Jongshin Shin (VLSI Technology and Circuits, 2022)