A Programmable Digital Neuro-Processor Design with Dynamically Reconfigurable Pipeline/Parallel Architecture. - Young-Jin Jang; Chan-Ho Park; Hyon-Soo Lee (ICPADS, 1998)

Design of sub-threshold current memory circuit for low power ADC. - Sung-Dae Yeo; Young-Jin Jang; Kyung-Ryang Lee; Seong-Kweon Kim (Inf. Syst., 2015)