A 16Gb LPDDR4X SDRAM with an NBTI-tolerant circuit solution, an SWD PMOS GIDL reduction technique, an adaptive gear-down scheme and a metastable-free DQS aligner in a 10nm class DRAM process. - Ki Chul Chun; Yonggyu Chu; Jin-Seok Heo; Tae-Sung Kim; Soohwan Kim; Hui-Kap Yang; Mi-Jo Kim; Chang-Kyo Lee; Ju-Hwan Kim; Hyunchul Yoon; Chang-Ho Shin; Sang-uhn Cha; et al. (ISSCC, 2018)

Scaling of Memory Performance and Capacity with CXL Memory Expander. - Sung Joo Park; H. Kim; K.-S. Kim; J. So; J. Ahn; W.-J. Lee; D. Kim; Young-Ju Kim 003; J. Seok; J.-G. Lee; H.-Y. Ryu; C. Y. Lee; et al. (HCS, 2022)