A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. - Young San Shin; Jae-Kyung Wee; Jong-Chan Ha; Ji-Hoon Lim; Yong-Ju Kim; Young-Sang Son (J. Circuits Syst. Comput., 2011)

Current readout circuit using two-stage amplification method for 64-channel CNT arrays. - Young San Shin; Seongsoo Lee; Jae-Kyung Wee (ISCAS, 2012)