An efficient dual-supply design for low-power mobile systems. - Hoi-Jin Lee; Youngmin Shin; Jae Cheol Son; Tae Hee Han; Bai-Sun Kong (ISOCC, 2012)

A 32nm high-k metal gate application processor with GHz multi-core CPU. - Se-Hyun Yang; Seogjun Lee; Jae Young Lee; Jeonglae Cho; Hoi-Jin Lee; Dongsik Cho; Junghun Heo; Sunghoon Cho; Youngmin Shin; Sunghee Yun; Euiseok Kim; Ukrae Cho; et al. (ISSCC, 2012)

Scan-controlled pulse flip-flops for mobile application processors. - Min-Su Kim; Hyoungwook Lee; Jin-Soo Park; Chunghee Kim; Juhyun Kang; Ken Shin; Emil Kagramanyan; Gunok Jung; Ukrae Cho; Youngmin Shin; Jae-Cheol Son (ISCAS, 2013)

28nm high- metal-gate heterogeneous quad-core CPUs for high-performance and energy-efficient mobile application processor. - Youngmin Shin; Ken Shin; Prashant Kenkare; Rajesh Kashyap; Hoi-Jin Lee; Dongjoo Seo; Brian Millar; Yohan Kwon; Ravi Iyengar; Min-Su Kim; Ahsan Chowdhury; Sung-il Bae; et al. (ISSCC, 2013)

A 1.6 GHz quad-core application processor manufactured in 32 nm high-k metal gate process for smart mobile devices. - Se-Hyun Yang; Jungyul Pyo; Youngmin Shin; Jae Cheol Son (IEEE Commun. Mag., 2013)

Session 23 overview: Low-power SoCs: High-performance digital subcommittee. - Andy Charnas; Youngmin Shin (ISSCC, 2015)

23.1 20nm high-K metal-gate heterogeneous 64b quad-core CPUs and hexa-core GPU for high-performance and energy-efficient mobile application processor. - Jungyul Pyo; Youngmin Shin; Hoi-Jin Lee; Sung-il Bae; Min-Su Kim; Kwangil Kim; Ken Shin; Yohan Kwon; Heungchul Oh; Jaeyoung Lim; Dong-Wook Lee; Jongho Lee; et al. (ISSCC, 2015)

Single-ended D flip-flop with implicit scan mux for high performance mobile AP. - Min-Su Kim; Chunghee Kim; Yong-geol Kim; Ah-Reum Kim; Jikyum Kim; Juhyun Kang; Daeseong Lee; Changjun Choi; Ilsuk Suh; Jungyul Pyo; Youngmin Shin; Jae Cheol Son (SoCC, 2016)

Session 26 overview: Processor-power management and clocking. - Kathy Wilcox; Youngmin Shin; Edith Beigné (ISSCC, 2017)

Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for Wide Voltage Scaling. - Min-Su Kim; Ah-Reum Kim; Yong-geol Kim; Chunghee Kim; Dong-Yeop Kim; Jong-Woo Kim; Daeseong Lee; Hyun Lee; Jungyul Pyo; Youngmin Shin; Jae Cheol Son (ISCAS, 2018)

Session 7 overview: Neuromorphic, clocking and security circuits: Digital circuits subcommittee. - Youngmin Shin; Phillip J. Restle; Edith Beigné (ISSCC, 2018)

A DTMOST-based Temperature Sensor with 3σ Inaccuracy of ±0.9°C for Self-Refresh Control in 28nm Mobile DRAM. - Sungsik Park; Yunhong Kim; Woojun Choi; Yong-Tae Lee; Sungbeen Kim; Youngmin Shin; Youngcheol Chae (CICC, 2020)

A Method of Via Variation Induced Delay Computation. - Moonsu Kim; Yun Heo; Seungjae Jung; Kelvin Le; Nathaniel Conos; Hanif Fatemi; Jongpil Lee; Youngmin Shin (DATE, 2020)