Parallel Prefix Adder Design with Matrix Representation. - Youngmoon Choi; Earl E. Swartzlander Jr. (IEEE Symposium on Computer Arithmetic, 2005)

Speculative Carry Generation With Prefix Adder. - Youngmoon Choi; Earl E. Swartzlander Jr. (IEEE Trans. Very Large Scale Integr. Syst., 2008)

The next-generation 64b SPARC core in a T4 SoC processor. - Jinuk Luke Shin; Heechoul Park; Hongping Penny Li; Alan P. Smith 002; Youngmoon Choi; Harikaran Sathianathan; Sudesna Dash; Sebastian Turullols; Song Kim; Robert P. Masleid; Georgios K. Konstadinidis; Robert T. Golla; et al. (ISSCC, 2012)

The Next Generation 64b SPARC Core in a T4 SoC Processor. - Jinuk Luke Shin; Robert T. Golla; Hongping Penny Li; Sudesna Dash; Youngmoon Choi; Alan P. Smith 002; Harikaran Sathianathan; Mayur Joshi; Heechoul Park; Mohamed Elgebaly; Sebastian Turullols; Song Kim; et al. (IEEE J. Solid State Circuits, 2013)

16.4: SambaNova SN40L: A 5nm 2.5D Dataflow Accelerator with Three Memory Tiers for Trillion Parameter AI. - Raghu Prabhakar; Junwei Zhou; Darshan Gandhi; Youngmoon Choi; Mahmood Khayatzadeh; Kyunglok Kim; Uma Durairajan; Jeongha Park; Satyajit Sarkar; Jinuk Luke Shin (ISSCC, 2025)