Aggressive Function Inlining: Preventing Loop Blockings in the Instruction Cache. - Yosi Ben-Asher; Omer Boehm; Daniel Citron; Gadi Haber; Moshe Klausner; Roy Levin; Yousef Shajrawi (HiPEAC, 2008)

Combining Height Reduction and Scheduling for VLIW Machines Enhanced with Three-Argument Arithmetic Operations. - Fadi Abboud; Yosi Ben-Asher; Yousef Shajrawi; Esti Stein (Int. J. Parallel Program., 2012)

1K manycore FPGA shared memory architecture for SOC (abstract only). - Yosi Ben-Asher; Jacob Gendel; Gadi Haber; Oren Segal; Yousef Shajrawi (FPGA, 2014)

A study of manycore shared memory architecture as a way to build SOC applications. - Yosi Ben-Asher; Yousef Shajrawi; Y. Gendel; Gadi Haber; Oren Segal (SpringSim (HPS), 2015)