The metal/polymer interface: a combined ionic spectrometries and density functional theory study. - Youssef Travaly (1997)

Impact of interconnect resistance increase on system performance of low power and high performance designs. - Mandeep Bamal; Youssef Travaly; Wenqi Zhang; Michele Stucchi; Karen Maex (SLIP, 2006)

TSV metrology and inspection challenges. - Ramakanth Alapati; Youssef Travaly; Jan Van Olmen; Ricardo Cotrin Teixeira; Jan Vaes; Marc van Cauwenbergh; Anne Jourdain; Greet Verbinnen; Gino Marcuccilli; Glenn Florence; Shay Wolfling; Christine Pelissier; et al. (3DIC, 2009)

Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping. - Yann Civale; Deniz Sabuncuoglu Tezcan; Harold G. G. Philipsen; P. Jaenen; Rahul Agarwal; F. Duval; Philippe Soussan; Youssef Travaly; Eric Beyne (3DIC, 2009)

3D Stacked IC demonstrator using Hybrid Collective Die-to-Wafer bonding with copper Through Silicon Vias (TSV). - Jan Van Olmen; Jan Coenen; Wim Dehaene; Kristin De Meyer; Cedric Huyghebaert; Anne Jourdain; Guruprasad Katti; Abdelkarim Mercha; Michal Rakowski; Michele Stucchi; Youssef Travaly; Eric Beyne; et al. (3DIC, 2009)

A novel concept for ultra-low capacitance via-last TSV. - Yann Civale; Marcel Gonzalez; Deniz Sabuncuoglu Tezcan; Youssef Travaly; Philippe Soussan; Eric Beyne (3DIC, 2010)

300mm wafer thinning and backside passivation compatibility with temporary wafer bonding for 3D stacked IC applications. - Anne Jourdain; Thibault Buisson; Alain Phommahaxay; Mark Privett; Dan Wallace; Sumant Sood; Peter Bisson; Eric Beyne; Youssef Travaly; Bart Swinnen (3DIC, 2010)

Verifying electrical/thermal/thermo-mechanical behavior of a 3D stack - Challenges and solutions. - Geert Van der Plas; Steven Thijs; Dimitri Linten; Guruprasad Katti; Paresh Limaye; Abdelkarim Mercha; Michele Stucchi; Herman Oprins; Bart Vandevelde; Nikolaos Minas; Miro Cupac; Morin Dehan; et al. (CICC, 2010)

Design issues and considerations for low-cost 3D TSV IC technology. - Geert Van der Plas; Paresh Limaye; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Domae Shinichi; Vladimir Cherman; et al. (ISSCC, 2010)

Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures. - Y. Yang; Riet Labie; F. Ling; C. Zhao; A. Radisic; Jan Van Olmen; Youssef Travaly; Bert Verlinden; Ingrid De Wolf (Microelectron. Reliab., 2010)

In-tier diagnosis of power domains in 3D TSV ICs. - Yuuki Araga; Makoto Nagata; Geert Van der Plas; Jaemin Kim; Nikolaos Minas; Pol Marchal; Youssef Travaly; Michael Libois; Antonio La Manna; Wenqi Zhang; Eric Beyne (3DIC, 2011)

Design Issues and Considerations for Low-Cost 3-D TSV IC Technology. - Geert Van der Plas; Paresh Limaye; Igor Loi; Abdelkarim Mercha; Herman Oprins; Cristina Torregiani; Steven Thijs; Dimitri Linten; Michele Stucchi; Guruprasad Katti; Dimitrios Velenis; Vladimir Cherman; et al. (IEEE J. Solid State Circuits, 2011)