On-chip temperature and voltage measurement for field testing. - Yukiya Miura; Yasuo Sato; Yousuke Miyake; Seiji Kajihara (ETS, 2012)

An On-Chip Digital Environment Monitor for Field Test. - Seiji Kajihara; Yousuke Miyake; Yasuo Sato; Yukiya Miura (ATS, 2014)

Temperature and Voltage Estimation Using Ring-Oscillator-Based Monitor for Field Test. - Yousuke Miyake; Yasuo Sato; Seiji Kajihara; Yukiya Miura (ATS, 2014)

Reduction of NBTI-Induced Degradation on Ring Oscillators in FPGA. - Yasuo Sato; Masafumi Monden; Yousuke Miyake; Seiji Kajihara (PRDC, 2014)

Temperature and Voltage Measurement for Field Test Using an Aging-Tolerant Monitor. - Yousuke Miyake; Yasuo Sato; Seiji Kajihara; Yukiya Miura (IEEE Trans. Very Large Scale Integr. Syst., 2016)

On the effects of real time and contiguous measurement with a digital temperature and voltage sensor. - Yousuke Miyake; Yasuo Sato; Seiji Kajihara (ITC-Asia, 2017)

On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs. - Yousuke Miyake; Seiji Kajihara; Poki Chen (ITC-Asia, 2019)

A Selection Method of Ring Oscillators for An On-Chip Digital Temperature And Voltage Sensor. - Yousuke Miyake; Yasuo Sato; Seiji Kajihara (ITC-Asia, 2019)

On-Chip Delay Measurement for In-Field Test of FPGAs. - Yousuke Miyake; Yasuo Sato; Seiji Kajihara (PRDC, 2019)

On Evaluation for Aging-Tolerant Ring Oscillators with Accelerated Life Test And Its Application to A Digital Sensor. - Masayuki Gondo; Yousuke Miyake; Takaaki Kato; Seiji Kajihara (ATS, 2020)

On-Chip Delay Measurement for Degradation Detection And Its Evaluation under Accelerated Life Test. - Yousuke Miyake; Takaaki Kato; Seiji Kajihara; Masao Aso; Haruji Futami; Satoshi Matsunaga; Yukiya Miura (IOLTS, 2020)

Path Delay Measurement with Correction for Temperature And Voltage Variations. - Yousuke Miyake; Takaaki Kato; Seiji Kajihara (ITC-Asia, 2020)

Innovative Test Practices in Asia. - Takeshi Iwasaki; Masao Aso; Haruji Futami; Satoshi Matsunaga; Yousuke Miyake; Takaaki Kato; Seiji Kajihara; Yukiya Miura; Smith Lai; Gavin Hung; Harry H. Chen; Haruo Kobayashi 001; et al. (VTS, 2020)

High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters. - Poki Chen; Jian-Ting Lan; Ruei-Ting Wang; Nguyen My Qui; John Carl Joel Salao Marquez; Seiji Kajihara; Yousuke Miyake (IEEE Trans. Very Large Scale Integr. Syst., 2020)

On Correction of A Delay Value Using Ring-Oscillators for Aging Detection and Prediction. - Takaaki Kato; Yousuke Miyake; Seiji Kajihara (ATS, 2022)

A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection. - Poki Chen; Joshua Adiel Wijaya; Seiji Kajihara; Trio Adiono; Hsiang-Yu Chen; Ruei-Ting Wang; Yousuke Miyake (IEEE Access, 2022)