Clock Period Minimization of Non-Zero Clock Skew Circuits. - Shih-Hsu Huang; Yow-Tyng Nieh (ICCAD, 2003)

Race-condition-aware clock skew scheduling. - Shih-Hsu Huang; Yow-Tyng Nieh; Feng-Pin Lu (DAC, 2005)

Minimizing peak current via opposite-phase clock tree. - Yow-Tyng Nieh; Shih-Hsu Huang; Sheng-Yu Hsu (DAC, 2005)

Fast multi-domain clock skew scheduling for peak current reduction. - Shih-Hsu Huang; Chia-Ming Chang 002; Yow-Tyng Nieh (ASP-DAC, 2006)

Register binding for clock period minimization. - Shih-Hsu Huang; Chun-Hua Cheng; Yow-Tyng Nieh; Wei-Chieh Yu (DAC, 2006)

State re-encoding for peak current minimization. - Shih-Hsu Huang; Chia-Ming Chang 002; Yow-Tyng Nieh (ICCAD, 2006)

Synthesis of nonzero clock skew circuits. - Shih-Hsu Huang; Yow-Tyng Nieh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Clock Period Minimization with Minimum Delay Insertion. - Shih-Hsu Huang; Chun-Hua Cheng; Chia-Ming Chang 002; Yow-Tyng Nieh (DAC, 2007)

Opposite-Phase Clock Tree for Peak Current Reduction. - Yow-Tyng Nieh; Shih-Hsu Huang; Sheng-Yu Hsu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

A Fast Register Scheduling Approach to the Architecture of Multiple Clocking Domains. - Shih-Hsu Huang; Chia-Ming Chang 002; Yow-Tyng Nieh (J. Inf. Sci. Eng., 2007)

Clock skew scheduling with race conditions considered. - Shih-Hsu Huang; Yow-Tyng Nieh (ACM Trans. Design Autom. Electr. Syst., 2007)

Opposite-phase register switching for peak current minimization. - Shih-Hsu Huang; Chia-Ming Chang 002; Yow-Tyng Nieh (ACM Trans. Design Autom. Electr. Syst., 2009)

Low-power timing closure methodology for ultra-low voltage designs. - Wen-Pin Tu; Chung-Han Chou; Shih-Hsu Huang; Shih-Chieh Chang; Yow-Tyng Nieh; Chien-Yung Chou (ICCAD, 2013)

Leakage-power-aware clock period minimization. - Hua-Hsin Yeh; Shih-Hsu Huang; Yow-Tyng Nieh (DATE, 2014)

Clock Period Minimization with Minimum Leakage Power. - Shih-Hsu Huang; Hua-Hsin Yeh; Yow-Tyng Nieh (ACM Trans. Design Autom. Electr. Syst., 2015)

Skew Minimization With Low Power for Wide-Voltage-Range Multipower-Mode Designs. - Chung-Han Chou; Hua-Hsin Yeh; Shih-Hsu Huang; Yow-Tyng Nieh; Shih-Chieh Chang; Yung-Tai Chang (IEEE Trans. Very Large Scale Integr. Syst., 2016)