High Throughput Hardware Implementation for Deep Learning AI Accelerator. - Chung-Bin Wu; Yu-Cheng Hsueh; Ching-Shun Wang; Yen-Chi Lai (ICCE-TW, 2019)

High Efficient Bandwidth Utilization Hardware Design and Implement for AI Deep Learning Accelerator. - Chung-Bin Wu; Yin-Tsung Hwang; Yu-Cheng Hsueh; Yu-Kuan Hsiao (ISOCC, 2020)