Variance-Classified Capacity Watermarking Using Discrete Cosine Transform. - Jing-Ming Guo; Yu-Cheng Lu; Jiann-Der Lee (IIH-MSP, 2008)

Knowledge transfer in response to organizational crises: An exploratory study. - Wei-Tsong Wang; Yu-Cheng Lu (Expert Syst. Appl., 2010)

All-Digital Frequency Synthesizer Using a Flying Adder. - Gang-Neng Sung; Szu-Chia Liao; Jian-Ming Huang; Yu-Cheng Lu; Chua-Chin Wang (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A Signed Array Multiplier with Bypassing Logic. - Chua-Chin Wang; Chia-Hao Hsu; Gang-Neng Sung; Yu-Cheng Lu (J. Signal Process. Syst., 2012)

A Reconfigurable Differential-to-Single-Ended Autonomous Current Adaptation Buffer Amplifier Suitable for Biomedical Applications. - Zu-Jia Lo; Yuan-Chuan Wang; Yun-Jie Huang; Ren-Yong Hung; Yi-Heng Wu; Tzu-Yun Wang; Yang-Jing Huang; Hui-Chun Huang; Yu-Cheng Lu; Sheng-Yu Peng; Chia-Yuan Chang; Wen-Sung Lai; et al. (IEEE Trans. Biomed. Circuits Syst., 2021)

Reducing NEXP-complete problems to DQBF. - Fa-Hsun Chen; Shen-Chang Huang; Yu-Cheng Lu; Tony Tan (FMCAD, 2022)

Aggressively Scaled Atomic Layer Deposited Amorphous InZnOx Thin Film Transistor Exhibiting Prominent Short Channel Characteristics (SS= 69 mV/dec.; DIBL = 27.8 mV/V) and High Gm(802 μS/μm at VDS = 2V). - Yan-Kui Liang; June-Yang Zheng; Yu-Lon Lin; Wei-Li Li; Yu-Cheng Lu; Dong-Ru Hsieh; Li-Chi Peng; Tsung-Te Chou; Chi-Chung Kei; Chun-Chieh Lu; Huai-Ying Huang; Yuan-Chieh Tseng; et al. (VLSI Technology and Circuits, 2023)

Design Technology Co-Optimization for CFET SRAM Cells Considering Double-Sided Signal/Power Routing. - Yu-Cheng Lu; Meng-Lin Wu; Vita Pi-Ho Hu (ISCAS, 2025)