A 2.4-Gsample/s DVFS FFT Processor for MIMO OFDM Communication Systems. - Yuan Chen; Yu-Wei Lin; Yu-Chi Tsao; Chen-Yi Lee (IEEE J. Solid State Circuits, 2008)

An Indexed-Scaling Pipelined FFT Processor for OFDM-Based WPAN Applications. - Yuan Chen; Yu-Chi Tsao; Yu-Wei Lin; Chin-Hung Lin; Chen-Yi Lee (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Hardware-efficient parallel FIR digital filter structures for symmetric convolutions. - Yu-Chi Tsao; Ken Choi (ISCAS, 2011)

Hardware-efficient VLSI implementation for 3-parallel linear-phase FIR digital filter of odd length. - Yu-Chi Tsao; Ken Choi (ISCAS, 2012)

Area-Efficient VLSI Implementation for Parallel Linear-Phase FIR Digital Filters of Odd Length Based on Fast FIR Algorithm. - Yu-Chi Tsao; Ken Choi (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

Area-Efficient Parallel FIR Digital Filter Structures for Symmetric Convolutions Based on Fast FIR Algorithm. - Yu-Chi Tsao; Ken Choi (IEEE Trans. Very Large Scale Integr. Syst., 2012)