Yu Deng

Affiliations:
  • National University of Defense Technology, School of Computer, Changsha, China


According to our database1, Yu Deng authored at least 26 papers between 2004 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2020
CSMO-DSE: Fast and Precise Application-driven DSE Guided by Criticality and Sensitivity Analysis.
ACM J. Emerg. Technol. Comput. Syst., 2020

ASIE: An Asynchronous SNN Inference Engine for AER Events Processing.
ACM J. Emerg. Technol. Comput. Syst., 2020

Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework.
Int. J. Comput. Sci. Eng., 2020

2019
A Systolic SNN Inference Accelerator and its Co-optimized Software Framework.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

ASIE: An Asynchronous SNN Inference Engine for AER Events Processing.
Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems, 2019

2018
Systolic Array Based Accelerator and Algorithm Mapping for Deep Learning Algorithms.
Proceedings of the Network and Parallel Computing, 2018

A Parallel Algorithm for Instruction Dependence Graph Analysis Based on Multithreading.
Proceedings of the IEEE International Conference on Parallel & Distributed Processing with Applications, 2018

A Power Efficient Hardware Implementation of the IF Neuron Model.
Proceedings of the Advanced Computer Architecture - 12th Conference, 2018

2017
Laius: An 8-Bit Fixed-Point CNN Hardware Inference Engine.
Proceedings of the 2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), 2017

2016
The Macro-DSE for HPC Processing Unit: The Physical Constraints Perspective.
Proceedings of the Green, Pervasive, and Cloud Computing - 11th International Conference, 2016

2015
A Scalable and Fast Microprocessor Design Space Exploration Methodology.
Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

2009
Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming.
IEEE Trans. Parallel Distributed Syst., 2009

Matrix-based streamization approach for improving locality and parallelism on FT64 stream processor.
J. Supercomput., 2009

SRF Coloring: Stream Register File Allocation via Graph Coloring.
J. Comput. Sci. Technol., 2009

Comparability graph coloring for optimizing utilization of stream register files in stream processors.
Proceedings of the 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, 2009

2008
Optimizing scientific application loops on stream processors.
Proceedings of the 2008 ACM SIGPLAN/SIGBED Conference on Languages, 2008

Scientific Computing Applications on a Stream Processor.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2008

A Double-Buffering Strategy for the SRF management in the Imagine Stream Processor.
Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2007
Implementation and Optimization of Sparse Matrix-Vector Multiplication on Imagine Stream Processor.
Proceedings of the Parallel and Distributed Processing and Applications, 2007

A 64-bit stream processor architecture for scientific applications.
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

Evaluation of Transcendental Functions on Imagine Architecture.
Proceedings of the 2007 International Conference on Parallel Processing (ICPP 2007), 2007

Efficient generation of stream programs from loops.
Proceedings of the 13th International Conference on Parallel and Distributed Systems, 2007

Laplace Transformation on the FT64 Stream Processor.
Proceedings of the Advances in Computer Systems Architecture, 2007

Implementation and Evaluation of Specific Data-Intensive Scientific Applications on the FT64 Stream Processor.
Proceedings of the Seventh International Conference on Computer and Information Technology (CIT 2007), 2007

2006
Matrix-Based Programming Optimization for Improving Memory Hierarchy Performance on Imagine.
Proceedings of the Parallel and Distributed Processing and Applications, 2006

2004
The Design and Performance Analysis of Embedded Parallel Multiprocessing System.
Proceedings of the Embedded Software and Systems, First International Conference, 2004


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