Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks. - Weijia Li; Yu Du 002; Youtao Zhang; Bruce R. Childers; Ping Zhou; Jun Yang 002 (EUC (1), 2008)

Thermal Management for 3D Processors via Task Scheduling. - Xiuyi Zhou; Yi Xu 010; Yu Du 002; Youtao Zhang; Jun Yang 002 (ICPP, 2008)

Frequent value compression in packet-based NoC architectures. - Ping Zhou; Bo Zhao 007; Yu Du 002; Yi Xu 010; Youtao Zhang; Jun Yang 002; Li Zhao 002 (ASP-DAC, 2009)

A low-radix and low-diameter 3D interconnection network design. - Yi Xu 010; Yu Du 002; Bo Zhao 007; Xiuyi Zhou; Youtao Zhang; Jun Yang 002 (HPCA, 2009)

Variation-tolerant non-uniform 3D cache management in die stacked multicore processor. - Bo Zhao 007; Yu Du 002; Youtao Zhang; Jun Yang 002 (MICRO, 2009)

Fine-grained QoS scheduling for PCM-based main memory systems. - Ping Zhou; Yu Du 002; Youtao Zhang; Jun Yang 002 (IPDPS, 2010)

LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory. - Lei Jiang 001; Yu Du 002; Youtao Zhang; Bruce R. Childers; Jun Yang 002 (DSN, 2011)

A composite and scalable cache coherence protocol for large scale CMPs. - Yi Xu 010; Yu Du 002; Youtao Zhang; Jun Yang 002 (ICS, 2011)

Writeback-aware partitioning and replacement for last-level caches in phase change main memory systems. - Miao Zhou; Yu Du 002; Bruce R. Childers; Rami G. Melhem; Daniel Mossé (ACM Trans. Archit. Code Optim., 2012)

Writeback-aware bandwidth partitioning for multi-core systems with PCM. - Miao Zhou; Yu Du 002; Bruce R. Childers; Rami G. Melhem; Daniel Mossé (PACT, 2013)

Bit mapping for balanced PCM cell programming. - Yu Du 002; Miao Zhou; Bruce R. Childers; Daniel Mossé; Rami G. Melhem (ISCA, 2013)

Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory. - Yu Du 002; Miao Zhou; Bruce R. Childers; Rami G. Melhem; Daniel Mossé (ACM Trans. Archit. Code Optim., 2013)

Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory. - Lei Jiang 001; Yu Du 002; Bo Zhao 007; Youtao Zhang; Bruce R. Childers; Jun Yang 002 (ACM Trans. Archit. Code Optim., 2013)

Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor. - Bo Zhao 007; Yu Du 002; Jun Yang 002; Youtao Zhang (IEEE Trans. Computers, 2013)

Errata to "Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor". - Bo Zhao 007; Yu Du 002; Jun Yang 002; Youtao Zhang (IEEE Trans. Computers, 2014)

Supporting superpages in non-contiguous physical memory. - Yu Du 002; Miao Zhou; Bruce R. Childers; Daniel Mossé; Rami G. Melhem (HPCA, 2015)

Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems. - Miao Zhou; Yu Du 002; Bruce R. Childers; Daniel Mossé; Rami G. Melhem (ACM Trans. Archit. Code Optim., 2016)