A Robust and Efficient Minutia-Based Fingerprint Matching Algorithm. - Wen Wen; Zhi Qi; Zhi Li; Junhao Zhang; Yu Gong 002; Peng Cao 002 (ACPR, 2013)

A novel configuration context cache structure of reconfigurable systems. - Yu Gong 002; Bo Liu 019; Chen Mei; Rui-he Wang (ASICON, 2015)

A novel routing structure of coarse-grained reconfigurable architecture for radar application. - Bo Liu 019; Dongming Zhang; Wei-qi Ge; Yu Gong 002 (ASICON, 2015)

Performance-Conscious Reconfiguration Structure for Large-Scale Coarse-Grained Reconfigurable System. - Bo Liu 019; Yu Gong 002; Rui-he Wang; Yang Liu (CyberC, 2015)

A Novel Design of Pipeline MDC-FFT Processor Based on Various Memory Access Mechanism. - Jinjiang Yang; Dongming Zhang; Yu Gong 002; Bo Liu 019 (CyberC, 2016)

Implementation and Verification of a High-Throughput Reconfigurable MIMO Detector. - Zhen Wang 019; Hai Qin; Yu Gong 002; Bo Liu 019 (CyberC, 2017)

Processing LSTM in memory using hybrid network expansion model. - Yu Gong 002; Tingting Xu; Bo Liu 019; Wei Ge; Jinjiang Yang; Jun Yang 006; Longxing Shi (SiPS, 2017)

An energy-efficient accelerator for hybrid bit-width DNNs. - Bo Liu 019; Xing Ruan; Mengwen Xia; Yu Gong 002; Jinjiang Yang; Wei Ge; Jun Yang 006 (SSCI, 2017)

E-ERA: An energy-efficient reconfigurable architecture for RNNs using dynamically adaptive approximate computing. - Bo Liu 019; Wei Dong; Tingting Xu; Yu Gong 002; Wei Ge; Jinjiang Yang; Longxing Shi (IEICE Electron. Express, 2017)

An Energy-efficient Reconfigurable Hybrid DNN Architecture for Speech Recognition with Approximate Computing. - Bo Liu 019; Shisheng Guo; Hai Qin; Yu Gong 002; Jinjiang Yang; Wei Ge; Jun Yang 006 (DSP, 2018)

EERA-ASR: An Energy-Efficient Reconfigurable Architecture for Automatic Speech Recognition With Hybrid DNN and Approximate Computing. - Bo Liu 019; Hai Qin; Yu Gong 002; Wei Ge; Mengwen Xia; Longxing Shi (IEEE Access, 2018)

EERA-DNN: An energy-efficient reconfigurable architecture for DNNs with hybrid bit-width and logarithmic multiplier. - Zhen Wang 019; Mengwen Xia; Bo Liu 019; Xing Ruan; Yu Gong 002; Jinjiang Yang; Wei Ge; Jun Yang 006 (IEICE Electron. Express, 2018)

RNA: Reconfigurable LSTM Accelerator with Near Data Approximate Processing. - Yu Gong 002; Bo Liu 026; Wei Ge; Longxing Shi (FPT, 2019)

EERA-KWS: A 163 TOPS/W Always-on Keyword Spotting Accelerator in 28nm CMOS Using Binary Weight Network and Precision Self-Adaptive Approximate Computing. - Bo Liu 019; Zhen Wang 019; Hu Fan; Jing Yang; Bo Liu 026; Wentao Zhu; Lepeng Huang; Yu Gong 002; Wei Ge; Longxing Shi (IEEE Access, 2019)

An Ultra-Low Power Always-On Keyword Spotting Accelerator Using Quantized Convolutional Neural Network and Voltage-Domain Analog Switching Network-Based Approximate Computing. - Bo Liu 019; Zhen Wang 019; Wentao Zhu; Yuhao Sun; Zeyu Shen 003; Lepeng Huang; Yan Li 056; Yu Gong 002; Wei Ge (IEEE Access, 2019)

ARA: Cross-Layer approximate computing framework based reconfigurable architecture for CNNs. - Yu Gong 002; Bo Liu 019; Wei Ge; Longxing Shi (Microelectron. J., 2019)

An energy-efficient voice activity detector using deep neural networks and approximate computing. - Bo Liu 019; Zhen Wang 019; Shisheng Guo; Huazhen Yu; Yu Gong 002; Jun Yang 006; Longxing Shi (Microelectron. J., 2019)

An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System Co-design and Self-adaptive Approximate Computing Based BWN. - Bo Liu 019; Yuhao Sun; Hao Cai 001; Zeyu Shen 003; Yu Gong 002; Lepeng Huang; Zhen Wang 019 (ACM Great Lakes Symposium on VLSI, 2020)

A Background Noise Self-adaptive VAD Using SNR Prediction Based Precision Dynamic Reconfigurable Approximate Computing. - Bo Liu 019; Yan Li 056; Lepeng Huang; Hao Cai 001; Wentao Zhu; Shisheng Guo; Yu Gong 002; Zhen Wang 019 (ACM Great Lakes Symposium on VLSI, 2020)

Binarized Weight Neural-Network Inspired Ultra-Low Power Speech Recognition Processor with Time-Domain Based Digital-Analog Mixed Approximate Computing. - Bo Liu 019; Hao Cai 001; Yu Gong 002; Wentao Zhu; Yan Li 056; Wei Ge; Zhen Wang 019 (ISCAS, 2020)

QCNN Inspired Reconfigurable Keyword Spotting Processor With Hybrid Data-Weight Reuse Methods. - Yu Gong 002; Yan Li 056; Xiaoling Ding; Haichuan Yang; Zilong Zhang; Xuan Zhang; Wei Ge; Zhen Wang 019; Bo Liu 019 (IEEE Access, 2020)

Accelerating Nested Conditionals on CGRA With Tag-Based Full Predication Method. - Jiang Sha; Wenbo Song; Yu Gong 002; Yingying Zhao (IEEE Access, 2020)

A 22nm, 10.8 μ W/15.1 μ W Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor. - Bo Liu 019; Hao Cai 001; Zhen Wang 019; Yuhao Sun; Zeyu Shen 003; Wentao Zhu; Yan Li 056; Yu Gong 002; Wei Ge; Jun Yang 006; Longxing Shi (IEEE Trans. Circuits Syst., 2020)

An Always-on Ultra-Low Power Speaker Verification Accelerator based on Binary Weighted Neural Network with System Co-optimization. - Haige Wu; Xuan Zhang; Xiaoling Ding; Ziyu Wang; Anfeng Xue; Yu Gong 002; Bo Liu 019 (ASICON, 2021)

Mutual Error Compensation based Area and Power efficient Approximate Multiplier. - Renyuan Zhang; Xuetao Wang; Ziyu Wang; Anfeng Xue; Haichuan Yang; Yu Gong 002; Bo Liu 019 (ASICON, 2021)

Low-Power Keyword Recognition Feature Extraction Circuit based on SRMFCC and Shared Multiplier for High Noise Background. - Zilong Zhang; Haichuang Yang; Xuan Zhang; Xiaoling Ding; Xuetao Wang; Yu Gong 002; Bo Liu 019 (ASICON, 2021)

A 1D-CRNN Inspired Reconfigurable Processor for Noise-robust Low-power Keywords Recognition. - Bo Liu 019; Zeyu Shen 003; Lepeng Huang; Yu Gong 002; Zilong Zhang; Hao Cai 001 (DATE, 2021)

Semi-Analytical Path Delay Variation Model With Adjacent Gates Decorrelation for Subthreshold Circuits. - Jingjing Guo; Peng Cao 002; Mengxiao Li; Yu Gong 002; Zhiyuan Liu 011; Geng Bai; Jun Yang 006 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing. - Bo Liu 019; Ziyu Wang; Xuetao Wang; Renyuan Zhang; Anfeng Xue; Qiao Shen 001; Na Xie; Yu Gong 002; Zhen Wang 019; Jun Yang 006; Hao Cai 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment. - Yu Gong 002; Hao Cai 001; Haige Wu; Wei Ge; Hao Yan 002; Zhen Wang 019; Longxing Shi; Bo Liu 019 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network. - Bo Liu 019; Hao Cai 001; Zilong Zhang; Xiaoling Ding; Ziyu Wang; Yu Gong 002; Weiqiang Liu 001; Jinjiang Yang; Zhen Wang 019; Jun Yang 006 (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Spice-Compatible Modeling of Double Barrier MTJ for Highly Reliable Circuits. - You Wang 002; Yefan Xu; Chaoyue Zhang; Yu Gong 002; Hao Cai 001; Weiqiang Liu 001 (ICTA, 2023)

Multiplication Circuit Architecture for Error- Tolerant CNN-Based Keywords Speech Recognition. - Bo Liu 019; Hao Cai 001; Zilong Zhang; Xiaoling Ding; Renyuan Zhang; Yu Gong 002; Zhen Wang 019; Wei Ge; Jun Yang 006 (IEEE Des. Test, 2023)

A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration. - Ziying Cui; Ke Chen 018; Bi Wu; Chenggang Yan 002; Yu Gong 002; Weiqiang Liu 001 (ARITH, 2024)

Truly Random Number Generation by Using in-Plane Magnetic Tunnel Junction with Weak Anisotropy. - You Wang 002; Chaoyue Zhang; Yefan Xu; Yu Gong 002; Hao Cai 001; Weiqiang Liu 001 (AsianHOST, 2024)

VoAD: A Sub-μW Multiscene Voice Activity Detector Deploying Analog-Frontend Digital-Backend Circuits. - Yu Gong 002; Bo Liu 019; Hao Cai 001; Longxing Shi; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

PreDAC: An Efficient Framework of Pre-Refining Enhanced Design Space Exploration for Approximate Computing. - Ziying Cui; Ke Chen 018; Bi Wu; Yu Gong 002; Chenggang Yan 002; Weiqiang Liu 001 (DAC, 2025)

Rank-based Multi-objective Approximate Logic Synthesis via Monte Carlo Tree Search. - Yuyang Ye 001; Xiangfei Hu; Yuchen Liu; Peng Xu 052; Yu Gong 002; Tinghuan Chen; Hao Yan 002; Bei Yu 001; Longxing Shi (DAC, 2025)

Exploring Teaching Methods for Courses on Radiation Hardening Technology in ICs. - You Wang 002; Erya Deng; Yu Gong 002; Zhongkun Shen; Chenghua Wang; Yijun Cui; Weiqiang Liu 001 (ISCAS, 2025)

A High-Performance In-Memory Multi-Bit Adder Based on TST-MRAM. - Erya Deng; Zhongkun Shen; Yu Gong 002; Weiqiang Liu 001 (ISCAS, 2025)

A Dual-Swing-Sample-and-Couple Sense Amplifier With Large Sensing Margin for STT-MRAM. - You Wang 002; Da Song; Jiaao Dai; Erya Deng; Yu Gong 002; Weiqiang Liu 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2025)