Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits. - Kuan-Ying Chiang; Yu-Hao Ho; Yo-Wei Chen; Cheng-Sheng Pan; James Chien-Mo Li (ATS, 2015)

Robust test pattern generation for hold-time faults in nanometer technologies. - Yu-Hao Ho; Yo-Wei Chen; Chih-Ming Chang; Kai-Chieh Yang; James Chien-Mo Li (VLSI-DAT, 2017)

Parallel order ATPG for test compaction. - Yu-Wei Chen; Yu-Hao Ho; Chih-Ming Chang; Kai-Chieh Yang; Ming-Ting Li; James Chien-Mo Li (VLSI-DAT, 2018)

HyFusion: Enhanced Reception Field Transformer for Hyperspectral Image Fusion. - Chia-Ming Lee; Yu-Fan Lin; Yu-Hao Ho; Li-Wei Kang; Chih-Chung Hsu (CoRR, 2025)