Cycle-time-aware sequential way-access set-associative cache for low energy consumption. - Chih-Hui Ting; Juinn-Dar Huang; Yu-Hsiang Kao (APCCAS, 2008)

Design of High-Radix Clos Network-on-Chip. - Yu-Hsiang Kao; Najla Alfaraj; Ming Yang; H. Jonathan Chao (NOCS, 2010)

BLOCON: A Bufferless Photonic Clos network-on-chip architecture. - Yu-Hsiang Kao; H. Jonathan Chao (NOCS, 2011)

CNoC: High-Radix Clos Network-on-Chip. - Yu-Hsiang Kao; Ming Yang; N. Sertac Artan; H. Jonathan Chao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Design of a Bufferless Photonic Clos Network-on-Chip Architecture. - Yu-Hsiang Kao; H. Jonathan Chao (IEEE Trans. Computers, 2014)

Queue-based segmentation algorithm for refining depth maps in light field camera applications. - Yi-Hsiang Chen; Nae-Chyun Chen; Yu-Hsiang Kao; Yu-Cheng Li; Yi-Chang Lu (GCCE, 2016)

An iterative re-weighted least squares processor design for deblurring parabolic camera images. - Yu-Hsiang Kao; Sheng-Jui Huang; Yi-Chang Lu (GCCE, 2016)

Transfer Learning for Keypoint Detection in Low-Resolution Thermal TUG Test Images. - Wei-Lun Chen; Chia-Yeh Hsieh; Yu-Hsiang Kao; Kai-Chun Liu; Sheng-Yu Peng; Yu Tsao 001 (CoRR, 2025)